PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 104
PIC24EP64MC204-E/PT
Manufacturer Part Number
PIC24EP64MC204-E/PT
Description
16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
Manufacturer
Microchip Technology
Datasheet
1.PIC24EP64MC204-EPT.pdf
(510 pages)
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dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
EXAMPLE 4-2:
The paged memory scheme provides access to
multiple 32-Kbyte windows in the EDS and PSV
memory. The data space page registers DSxPAG, in
combination with the upper half of data space address
can provide up to 16 Mbytes of additional address
space in the EDS and 8 Mbytes (DSRPAG only) of PSV
address space. The paged data memory space is
shown in
The program space (PS) can be accessed with
DSRPAG of 0x200 or greater. Only reads from PS are
supported using the DSRPAG. Writes to PS are not
supported, so DSWPAG is dedicated to DS, including
EDS, only. The data space and EDS can be read from
and written to using DSRPAG and DSWPAG,
respectively.
DS70657F-page 104
Note: DS read access when DSRPAG = 0x000 will force an Address Error trap.
Example
(DSWPAG = don't care)
4-3.
EXTENDED DATA SPACE (EDS) WRITE ADDRESS GENERATION
EA<15> = 0
PSV address
Generate
DSWPAG<8:0>
No EDS access
9 bits
24-bit EDS EA
EA<15>
0
1
16-bit DS EA
15 bits
EA
EA
2011-2012 Microchip Technology Inc.
Select
Byte
Select
Byte
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