PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 161

• Manufacturer Part Number: PIC24EP64MC204-E/PT
• Description: 16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
• Manufacturer: Microchip Technology

10.0
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X, and PIC24EPXXXGP/MC20X devices provide
the ability to manage power consumption by
selectively managing clocking to the CPU and the
peripherals. In general, a lower clock frequency and
a reduction in the number of peripherals being
clocked constitutes lower consumed power.
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X,
and PIC24EPXXXGP/MC20X devices can manage
power consumption in four ways:
• Clock frequency
• Instruction-based Sleep and Idle modes
• Software-controlled Doze mode
• Selective peripheral control in software
Combinations of these methods can be used to selec-
tively tailor an application’s power consumption while
still maintaining critical application features, such as
timing-sensitive communications.
EXAMPLE 10-1:
 2011-2012 Microchip Technology Inc.
PWRSAV #SLEEP_MODE
PWRSAV #IDLE_MODE
Note 1: This data sheet summarizes the features
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
2: Some registers and associated bits
POWER-SAVING FEATURES
of
dsPIC33EPXXXMC20X/50X,
PIC24EPXXXGP/MC20X
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 9. “Watchdog
Timer
(DS70615) of the “dsPIC33E/PIC24E
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
the
and
PWRSAV INSTRUCTION SYNTAX
Power-Saving
; Put the device into Sleep mode
; Put the device into Idle mode
dsPIC33EPXXXGP50X,
families
Modes”
and
of
in
10.1
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X, and PIC24EPXXXGP/MC20X devices allow a
wide range of clock frequencies to be selected under
application control. If the system clock configuration is
not locked, users can choose low-power or high-
precision oscillators by simply changing the NOSC bits
(OSCCON<10:8>). The process of changing a system
clock during operation, as well as limitations to the
process, are discussed in more detail in
“Oscillator
10.2
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X, and PIC24EPXXXGP/MC20X devices have two
special
through
instruction. Sleep mode stops clock operation and
halts all code execution. Idle mode halts the CPU
and code execution, but allows peripheral modules
to continue operation. The assembler syntax of the
PWRSAV instruction is shown in
Sleep and Idle modes can be exited as a result of an
enabled interrupt, WDT time-out or a device Reset. When
the device exits these modes, it is said to “wake up”.
Note:
Clock Frequency and Clock
Switching
Instruction-Based Power-Saving
Modes
power-saving
the
SLEEP_MODE and IDLE_MODE are con-
stants defined in the assembler include
file for the selected device.
Configuration”.
execution
modes
of
Example
a
that
DS70657F-page 161
special
are
10-1.
Section 9.0
PWRSAV
entered