PSB21150FV14NT Infineon Technologies, PSB21150FV14NT Datasheet - Page 255
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PSB21150FV14NT
Manufacturer Part Number
PSB21150FV14NT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150FV14NT.pdf
(270 pages)
Specifications of PSB21150FV14NT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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5.13
To improve performance with respect to EMC and ESD requirements it is recommended
to provide additional capacitors in the middle tap of the transformers (see
below). The values for C1 and C2 should be in the range 1 ... 10 nF. They can be located
either on the chip side of the transformer (option 1) or on the S bus side (option 2), but
not on both sides.
This improves EMC immunity acording to EN55024 which is mandatory since 2001-07-
01.
Note: The figure does not show any other components required for protection circuit in
Figure 105
Data Sheet
with 1 kHz, 80% amplitude
Test Generator
0.15MHz - 80MHz carrier
modulated signal
receive and transmit direction as this is not affected by including C1 and C2.
EMC / ESD Aspects
Transformer Circuitry
AC
Transmitter (NT)
Parasitic Capacity: C
Couple Capacity: C
Test Setup
C1 and C2 are also possible
at this position (option 2)
AC
k1
p1
¹ C
¹ C
k2
p2
¹ C
¹ C
C
C
1
2
k3
p3
¹ C
¹ C
k4
255
p4
C
C
C
C
k1
k2
k3
k4
C
C
common mode signals (option 1)
1
2
C1, C2 required to supress
C
C
p1
p3
Transmitter (TE)
C
C
p2
p4
Electrical Characteristics
AC
SR1
SR2
SX1
SX2
PSB/PSF 21150
21150_34
Figure 105
2003-01-30
IPAC-X
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