PSB21150FV14NT Infineon Technologies, PSB21150FV14NT Datasheet - Page 194
PSB21150FV14NT
Manufacturer Part Number
PSB21150FV14NT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150FV14NT.pdf
(270 pages)
Specifications of PSB21150FV14NT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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SQXR1
SQRR2
4.2.7
Value after reset: 4F
MFEN ... Multiframe Enable
Used to enable or disable the multiframe structure (see
0: S/T multiframe is disabled
1: S/T multiframe is enabled
Readback value in SQRR1.
SQX1-4 ... Transmitted S/Q Bits
Transmitted Q bits (F
transmitted S bits (F
4.2.8
Value after reset: 00
SQR21-24, SQR31-34... Received S Bits (TE mode only)
Received S bits in frames 2, 7, 12 and 17 (SQR21-24, subchannel 2),
and in frames 3, 8, 13 and 18 (SQR31-34, subchannel 3).
Data Sheet
7
7
SQR21 SQR22 SQR23 SQR24 SQR31 SQR32 SQR33 SQR34
SQXR1- S/Q-Channel TX Register 1
SQRR2 - S/Q-Channel Receive Register 2
0
MFEN
A
H
H
A
bit position) in frames 1, 6, 11 and 16 (NT mode).
bit position) in frames 1, 6, 11 and 16 (TE mode),
0
0
194
SQX1 SQX2 SQX3 SQX4
Detailed Register Description
Chapter
3.3.2)
0
0
PSB/PSF 21150
2003-01-30
IPAC-X
WR (35)
RD (36)
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