PSB21150FV14NT Infineon Technologies, PSB21150FV14NT Datasheet - Page 192

• Manufacturer Part Number: PSB21150FV14NT
• Manufacturer: Infineon Technologies

Specifications of PSB21150FV14NT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

TR_
CMD
4.2.5
Value after reset: 08
Important: This register is only writable if the Layer 1 state machine of the IPAC-X is
disabled (TR_CONF0.L1SW = 1)! With the IPAC layer 1 state machine enabled, the
signals from this register are automatically generated but nevertheless this register can
always be read. DPRIO can also be written in Intelligent NT mode.
XINF ... Transmit INFO
000: Transmit INFO 0
001: reserved
010: Transmit INFO 1 (TE mode) or INFO 2 (NT mode)
011: Transmit INFO 3 (TE mode) or INFO 4 (NT mode)
100: Send continous pulses at 192 kbit/s alternating or 96 kHz rectangular, respectively
(SCP)
101: Send single pulses at 4 kbit/s with alternating polarity corresponding to 2 kHz
fundamental mode (SSP)
11x: reserved
DPRIO ... D-Channel Priority (always writable in Int. NT mode)
0: Priority Class 1for D channel access on IOM (Int. NT) or on S interface (TE/LT-T)
1: Priority Class 2 for D channel access on IOM (Int. NT) or on S interface (TE/LT-T)
TDDIS ... Transmit Data Disabled (TE mode)
0: The B and D channel data are transparently transmitted on the S/T interface if INFO 3
1: The B and D channel data are set to logical ’1’ on the S/T interface if INFO 3 is being
PD ... Power Down
0: The transceiver is set to operational mode
1: The transceiver is set to power down mode
For general information please refer to
Data Sheet
is being transmitted
transmitted
7
TR_CMD - Transceiver Command Register
XINF
H
DPRIO TDDIS
Chapter
192
3.5.1.2.
PD
Detailed Register Description
LP_A
0
PSB/PSF 21150
0
RD/WR (34)
2003-01-30
IPAC-X