PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 19

PEF82912FV14XP

Manufacturer Part Number
PEF82912FV14XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF82912FV14XP

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
1.4
• Integrated U-hybrid
• On-chip HDLC controller
• ’Self test request’ and ’Self test passed’ of U-transceiver
• TE-mode of the S-transceiver
• DECT-link capability
• SRA (capacitive receiver coupling is not suited for S-feeding).
• ’NT-Star’ with star point on the IOM
• No access to S2-5 channels. Access only to S1 and Q channel as in SCOUT. No
• The oscillator architecture was changed with respect to the INTC-Q to reduce power
Data Sheet
selection between transparent and non-auto mode provided.
consumption. As a consequence, the Q-SMINT
can not be connected to an external clock as it was possible for IEC-Q and NTC-Q.
This does not limit the use of the Q-SMINT
anyway.
Not Supported are ...
®
-2 bus (already not supported in INTC-Q).
5
®
I in NTs since all NT designs use crystals
®
I always needs a crystal and pin XIN
PEF 82912/82913
2001-03-30
Overview

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