PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 151
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PEF82912FV14XP
Manufacturer Part Number
PEF82912FV14XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF82912FV14XP.pdf
(240 pages)
Specifications of PEF82912FV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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4.2
Special events in the Q-SMINT I are indicated by means of a single interrupt output,
which requests the host to read status information from the Q-SMINT I or transfer data
from/to the Q-SMINT I.
Since only one INT request output is provided, the cause of an interrupt must be
determined by the host reading the interrupt status registers of the Q-SMINT I.
The structure of the interrupt status registers is shown in
Figure 73
Data Sheet
MASK
WOV
MOS
CIC
INT
ST
S
U
1
1
Interrupts
Q-SMINT I Interrupt Status Registers
WOV
ISTA
MOS
CIC
ST
U
0
S
0
MASKU
FE/NEBE
12ms
EOC
M56
6ms
MLT
M4
CI
ISTAU
FE/NEBE
12ms
MLT
EOC
M56
6ms
CI
CI1E
M4
CIX1
137
STOV20
STOV11
STOV21
STOV10
MSTI
STI11
STI10
STI21
STI20
CIC0
CIC1
CIR0
STOV20
Figure
STOV21
STOV11
STOV10
STI11
STI10
STI21
STI20
MASKS
STI
MOCR
MRE
SQC
SQW
MIE
RIC
LD
73.
Register Description
PEF 82912/82913
ACK10
ACK11
ACK21
ACK20
ISTAS
ASTI
MOSR
MER
SQW
MDR
MDA
MAB
SQC
RIC
LD
2001-03-30
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