PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 174

• Manufacturer Part Number: PEF82912FV14XP
• Manufacturer: Lantiq

Specifications of PEF82912FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.8
4.8.1
ISTA
Value after reset: 00
U
ST
CIC
WOV
S
Data Sheet
U
7
Interrupt and General Configuration Registers
ISTA - Interrupt Status Register
U-Transceiver Interrupt
0 =
1 =
Synchronous Transfer
0 =
1 =
C/I Channel Change
0 =
1 =
0 =
Watchdog Timer Overflow
0 =
1 =
S-Transceiver Interrupt
ST
inactive
An interrupt was generated by the U-transceiver. Read the ISTAU
register.
inactive
This interrupt enables the microcontroller to lock on to the IOM
timing, for synchronous transfers.
inactive
A change in C/I0 channel or C/I1 channel has been recognized.
The actual value can be read from CIR0 or CIR1.
inactive
inactive
Signals the expiration of the watchdog timer, which means that the
microcontroller has failed to set the watchdog timer control bits
WTC1 and WTC2 (MODE1 register) in the correct manner. A reset
out pulse on pin RSTO has been generated by the Q-SMINT I.
H
CIC
0
read
160
WOV
S
Register Description
PEF 82912/82913
MOS
Address:
2001-03-30
0
0
®
3C
-2
H