PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 186
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PEB3086HV14XP
Manufacturer Part Number
PEB3086HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3086HV14XP.pdf
(262 pages)
Specifications of PEB3086HV14XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
- Current page: 186 of 262
- Download datasheet (4Mb)
SQXR1
SQRR2
SQXR2
4.2.7
Value after reset: 4F
MFEN ... Multiframe Enable
Used to enable or disable the multiframe structure (see
0: S/T multiframe is disabled
1: S/T multiframe is enabled
Readback value in SQRR1.
SQX1-4 ... Transmitted S/Q Bits
Transmitted Q bits (F
transmitted S bits (F
4.2.8
Value after reset: 00
SQR21-24, SQR31-34... Received S Bits (TE mode only)
Received S bits in frames 2, 7, 12 and 17 (SQR21-24, subchannel 2),
and in frames 3, 8, 13 and 18 (SQR31-34, subchannel 3).
4.2.9
Value after reset: 00
Data Sheet
7
7
7
SQR21 SQR22 SQR23 SQR24 SQR31 SQR32 SQR33 SQR34
SQX21 SQX22 SQX23 SQX24 SQX31 SQX32 SQX33 SQX34
SQXR1- S/Q-Channel TX Register 1
SQRR2 - S/Q-Channel Receive Register 2
SQXR2 - S/Q-Channel TX Register 2
0
MFEN
A
H
H
H
A
bit position) in frames 1, 6, 11 and 16 (NT mode).
bit position) in frames 1, 6, 11 and 16 (TE mode),
0
0
186
SQX1 SQX2 SQX3 SQX4
Detailed Register Description
Chapter
3.3.2)
0
0
0
PEB 3086
2003-01-30
ISAC-SX
WR (35)
WR (36)
RD (36)
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