PSB3186FV14NP Infineon Technologies, PSB3186FV14NP Datasheet - Page 38
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PSB3186FV14NP
Manufacturer Part Number
PSB3186FV14NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV14NP.pdf
(200 pages)
Specifications of PSB3186FV14NP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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3.2.6
The activated state of the S-interface is directly indicated via pin ACL (Activation LED).
An LED with pre-resistance may directly be connected to this pin and a low level is driven
on ACL as soon as the layer 1 state machine reaches the activated state (see
Figure
Figure 13
By default (ACFG2.ACL=0) the state of layer 1 is indicated at pin ACL. If the automatic
indication of the activated layer 1 is not required, the state on pin ACL can also be
controlled by the host (see
If ACFG2.ACL=1 the LED on pin ACL can be switched on (ACFG2.LED=1) and off
(ACFG2.LED=0) by the host.
Figure 14
Data Sheet
13).
+3.3V
Activation Indication via Pin ACL
ACL Indication of Activated Layer 1
ACL Configuration
ACL
ACFG2:ACL
Figure
'1'
'0'
14).
38
ACFG2:LED
0 : off
1 : on
Description of Functional Blocks
Layer 1
3086_15
S Interface
ISAC-SX TE
PSB 3186
2003-01-30
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