PSB3186FV14NP Infineon Technologies, PSB3186FV14NP Datasheet - Page 154
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PSB3186FV14NP
Manufacturer Part Number
PSB3186FV14NP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV14NP.pdf
(200 pages)
Specifications of PSB3186FV14NP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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DCI_CR
CS2-0 ... Channel Select for Transceiver D-channel
This register is used to select one of eight IOM channels to which the transceiver
D-channel data is related to.
Note: It should be noted that writing TR_CR.CS2-0 will also write to TRC_CR.CS2-0 and
4.3.4.1
Value after reset: 00
TRC_CR
Write access to this register is possible if IOM_CR.CI_CS = 0 or IOM_CR.CI_CS = 1.
Read access to this register is possible only if IOM_CR.CI_CS = 1.
CS2-0 ... Channel Select for the Transceiver C/I0 Channel
This register is used to select one of eight IOM channels to which the transceiver C/I0
channel data is related to.
4.3.5
Value after reset: A0
Read and write access to this register is only possible if IOM_CR.CI_CS = 0.
DPS_CI1 ... Data Port Selection CI1 Handler Data
0: The CI1 handler data is output on DD and input from DU
1: The CI1 handler data is output on DU and input from DD
EN_CI1 ... Enable CI1 Handler Data
0: CI1 handler data access is disabled
1: CI1 handler data access is enabled
Data Sheet
therefore modify the channel selection for the transceiver
C/I0 data.
7
TRC_CR - Control Register Transceiver C/I0 (IOM_CR.CI_CS=1)
7
DCI_CR - Control Register for D and CI1 Handler
(IOM_CR.CI_CS=0)
DPS_
CI1
0
EN_
H
CI1
H
0
EN_D
D_
0
EN_B2
D_
0
154
EN_B1
D_
0
Detailed Register Description
CS2-0
CS2-0
0
0
ISAC-SX TE
RD/WR (53)
RD/WR (50)
PSB 3186
2003-01-30
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