ICS1893AFI IDT, Integrated Device Technology Inc, ICS1893AFI Datasheet - Page 5

• Manufacturer Part Number: ICS1893AFI
• Description: PHYCEIVER LOW PWR 3.3V 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893AFI

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Other names: 1893AFI

ICS1893AF, Rev. D 10/26/04
Section
8.5
8.5.1
8.5.2
8.5.3
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6
8.7
8.7.1
8.7.2
8.7.3
8.7.4
8.7.5
8.8
8.8.1
8.8.2
8.8.3
8.8.4
8.8.5
8.8.6
8.9
8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.10
8.10.1
8.10.2
8.10.3
8.10.4
8.10.5
ICS1893AF Data Sheet - Release
Register 3: PHY Identifier Register ........................................................................70
OUI bits 19-24 (bits 3.15:10) ..................................................................................70
Manufacturer’s Model Number (bits 3.9:4) .............................................................71
Revision Number (bits 3.3:0) .................................................................................71
Register 4: Auto-Negotiation Register ...................................................................72
Next Page (bit 4.15) ...............................................................................................72
IEEE Reserved Bit (bit 4.14) ..................................................................................72
Remote Fault (bit 4.13) ..........................................................................................73
IEEE Reserved Bits (bits 4.12:10) .........................................................................73
Technology Ability Field (bits 4.9:5) .......................................................................74
Selector Field (Bits 4.4:0) .......................................................................................75
Register 5: Auto-Negotiation Link Partner Ability Register ....................................76
Next Page (bit 5.15) ...............................................................................................76
Acknowledge (bit 5.14) ..........................................................................................77
Remote Fault (bit 5.13) ..........................................................................................77
Technology Ability Field (bits 5.12:5) .....................................................................77
Selector Field (bits 5.4:0) .......................................................................................77
Register 6: Auto-Negotiation Expansion Register ..................................................78
IEEE Reserved Bits (bits 6.15:5) ...........................................................................78
Parallel Detection Fault (bit 6.4) .............................................................................79
Link Partner Next Page Able (bit 6.3) ....................................................................79
Next Page Able (bit 6.2) .........................................................................................79
Page Received (bit 6.1) .........................................................................................79
Link Partner Auto-Negotiation Able (bit 6.0) ..........................................................79
Register 7: Auto-Negotiation Next Page Transmit Register ...................................80
Next Page (bit 7.15) ...............................................................................................81
IEEE Reserved Bit (bit 7.14) ..................................................................................81
Message Page (bit 7.13) ........................................................................................81
Acknowledge 2 (bit 7.12) .......................................................................................81
Toggle (bit 7.11) .....................................................................................................81
Message Code Field / Unformatted Code Field (bits 7.10:0) .................................81
Register 8: Auto-Negotiation Next Page Link Partner Ability Register ...................82
Next Page (bit 8.15) ...............................................................................................83
IEEE Reserved Bit (bit 8.14) ..................................................................................83
Message Page (bit 8.13) ........................................................................................83
Acknowledge 2 (bit 8.12) .......................................................................................83
Message Code Field / Unformatted Code Field (bits 8.10:0) .................................83
Copyright © 2004, Integrated Circuit Systems, Inc.
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Table of Contents
October, 2004
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