ICS1893AFI IDT, Integrated Device Technology Inc, ICS1893AFI Datasheet - Page 3

• Manufacturer Part Number: ICS1893AFI
• Description: PHYCEIVER LOW PWR 3.3V 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893AFI

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Other names: 1893AFI

ICS1893AF, Rev. D 10/26/04
Section
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.4
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.4.7
7.4.8
7.5
7.5.1
7.5.2
7.5.3
7.5.4
7.5.5
7.5.6
7.5.7
7.5.8
7.5.9
7.5.10
7.5.11
7.5.12
7.5.13
7.5.14
7.6
7.6.1
7.6.2
ICS1893AF Data Sheet - Release
Functional Block: 100Base-X PCS and PMA Sublayers ........................................40
PCS Sublayer ........................................................................................................40
PMA Sublayer ........................................................................................................40
PCS/PMA Transmit Modules .................................................................................41
PCS/PMA Receive Modules ..................................................................................42
PCS Control Signal Generation .............................................................................43
4B/5B Encoding/Decoding .....................................................................................43
Functional Block: 100Base-TX TP-PMD Operations .............................................44
100Base-TX Operation: Stream Cipher Scrambler/Descrambler ..........................44
100Base-TX Operation: MLT-3 Encoder/Decoder .................................................44
100Base-TX Operation: DC Restoration ................................................................44
100Base-TX Operation: Adaptive Equalizer ..........................................................45
100Base-TX Operation: Twisted-Pair Transmitter .................................................45
100Base-TX Operation: Twisted-Pair Receiver .....................................................45
100Base-TX Operation: Auto Polarity Correction ..................................................46
100Base-TX Operation: Isolation Transformer ......................................................46
Functional Block: 10Base-T Operations ................................................................47
10Base-T Operation: Manchester Encoder/Decoder .............................................47
10Base-T Operation: Clock Synthesis ...................................................................47
10Base-T Operation: Clock Recovery ...................................................................47
10Base-T Operation: Idle .......................................................................................48
10Base-T Operation: Link Monitor .........................................................................48
10Base-T Operation: Smart Squelch .....................................................................49
10Base-T Operation: Carrier Detection .................................................................49
10Base-T Operation: Collision Detection ...............................................................49
10Base-T Operation: Jabber ..................................................................................50
10Base-T Operation: SQE Test .............................................................................50
10Base-T Operation: Twisted-Pair Transmitter .....................................................51
10Base-T Operation: Twisted-Pair Receiver .........................................................51
10Base-T Operation: Auto Polarity Correction .......................................................51
10Base-T Operation: Isolation Transformer ...........................................................51
Functional Block: Management Interface ...............................................................52
Management Register Set Summary .....................................................................52
Management Frame Structure ...............................................................................52
Copyright © 2004, Integrated Circuit Systems, Inc.
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Table of Contents
October, 2004
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