PIC18F2320-I/SO Microchip Technology Inc., PIC18F2320-I/SO Datasheet - Page 273
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F2320-I/SO
Manufacturer Part Number
PIC18F2320-I/SO
Description
Microcontroller; 8 KB Flash; 512 RAM; 256 EEPROM; 25 I/O; 28-Pin-SOIC
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F2320-ISO.pdf
(388 pages)
Specifications of PIC18F2320-I/SO
A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
8K Bytes
Ram Size
512 Bytes
Speed
20 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
2003 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FLAG_REG
FLAG_REG
Q1
register ‘f’
Clear f
[ label ] CLRF
0
a
000h
1
Z
Clears the contents of the specified
register. If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1
CLRF
Read
0110
Q2
=
=
f
[0,1]
Z
255
0x5A
0x00
f
101a
Process
FLAG_REG
Data
Q3
f [,a]
ffff
register ‘f’
PIC18F2220/2320/4220/4320
Write
Q4
ffff
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
WDT Counter
WDT Counter
WDT Postscaler
TO
PD
Q1
operation
Clear Watchdog Timer
[ label ] CLRWDT
None
000h
000h
1
1
TO, PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
postscaler of the WDT. Status bits
TO and PD are set.
1
1
CLRWDT
0000
No
Q2
TO,
PD
=
=
=
=
=
WDT,
WDT postscaler,
0000
?
0x00
0
1
1
Process
Data
Q3
DS39599C-page 271
0000
operation
No
Q4
0100
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