PIC18F45J10-I/ML Microchip Technology Inc., PIC18F45J10-I/ML Datasheet - Page 96

• Manufacturer Part Number: PIC18F45J10-I/ML
• Description: 44 PIN, 32 KB FLASH, 1024 RAM
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45J10-I/ML

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 32
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 2-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F45J10 FAMILY
9.1.3
Though the V
these devices are still capable of interfacing with 5V
systems, even if the V
3.6V. This is accomplished by adding a pull-up resistor
to the port pin (Figure 9-2), clearing the LAT bit for that
pin and manipulating the corresponding TRIS bit
(Figure 9-1) to either allow the line to be pulled high or
to drive the pin low. Only port pins that are tolerant of
voltages up to 5.5V can be used for this type of
interface (refer to Section 9.1.2 “Input Pins and
Voltage Considerations”).
FIGURE 9-2:
EXAMPLE 9-1:
DS39682B-page 94
BCF
BCF
BCF
PIC18F45J10
LATD, 7
TRISD, 7 ; send a 0 to the 5V system
TRISD, 7 ; send a 1 to the 5V system
INTERFACING TO A 5V SYSTEM
RD7
DDMAX
; set up LAT register so
; changing TRIS bit will
; drive line low
of the PIC18F45J10 family is 3.6V,
IH
+5V SYSTEM HARDWARE
INTERFACE
COMMUNICATING WITH
THE +5V SYSTEM
of the target system is above
+5V
+5V Device
Preliminary
output by setting the appropriate bits in the CMCON
9.2
PORTA is a 5-bit wide, bidirectional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
high-impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the
pins, whereas writing to it, will write to the port latch.
The Data Latch (LATA) register is also memory mapped.
Read-modify-write operations on the LATA register read
and write the latched output value for PORTA.
The other PORTA pins are multiplexed with analog
inputs, the analog V
parator voltage reference output. The operation of pins
RA3:RA0 and RA5 as A/D converter inputs is selected
by clearing or setting the control bits in the ADCON1
register (A/D Control Register 1).
Pins RA0 and RA3 may also be used as comparator
inputs and RA5 may be used as the C2 comparator
register. To use RA3:RA0 as digital inputs, it is also
necessary to turn off the comparators.
All PORTA pins have TTL input levels and full CMOS
output drivers.
The TRISA register controls the direction of the PORTA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 9-2:
CLRF
CLRF
MOVLW
MOVWF
MOVWF
MOVWF
MOVLW
MOVWF
Note:
PORTA, TRISA and LATA Registers
PORTA
LATA
07h
ADCON1
07h
CMCON
0CFh
TRISA
On a Power-on Reset, RA5 and RA3:RA0
are configured as analog inputs and read
as ‘0’.
REF
; Initialize PORTA by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; for digital inputs
; Configure comparators
; for digital input
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
INITIALIZING PORTA
+ and V
© 2006 Microchip Technology Inc.
REF
- inputs and the com-