PIC18F45J10-I/ML Microchip Technology Inc., PIC18F45J10-I/ML Datasheet - Page 127

• Manufacturer Part Number: PIC18F45J10-I/ML
• Description: 44 PIN, 32 KB FLASH, 1024 RAM
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45J10-I/ML

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 32
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 2-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

13.2
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 register when an
event occurs on the corresponding CCPx pin. An event
is defined as one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by the mode select bits,
CCPxM3:CCPxM0 (CCPxCON<3:0>). When a capture
is made, the interrupt request flag bit, CCPxIF, is set; it
must be cleared in software. If another capture occurs
before the value in register CCPRx is read, the old
captured value is overwritten by the new captured value.
13.2.1
In Capture mode, the appropriate CCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
13.2.2
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false inter-
rupts. The interrupt flag bit, CCPxIF, should also be
cleared following any such change in operating mode.
FIGURE 13-1:
© 2006 Microchip Technology Inc.
Note:
Capture Mode
CCP PIN CONFIGURATION
If RB3/CCP2 or RC1/CCP2 is configured
as an output, a write to the port can cause
a capture condition.
SOFTWARE INTERRUPT
CCP2 pin
CCP1 pin
CAPTURE MODE OPERATION BLOCK DIAGRAM
CCP1CON<3:0>
CCP2CON<3:0>
Prescaler
÷ 1, 4, 16
Prescaler
÷ 1, 4, 16
Q1:Q4
4
Edge Detect
Edge Detect
4
4
Preliminary
and
and
Set CCP2IF
Set CCP1IF
PIC18F45J10 FAMILY
13.2.3
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM3:CCPxM0). Whenever
the CCP module is turned off or Capture mode is
disabled, the prescaler counter is cleared. This means
that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 13-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 13-1:
CLRF
MOVLW
MOVWF
CCP2CON
NEW_CAPT_PS
CCP2CON
CCP PRESCALER
CCPR1H
CCPR2H
TMR1H
TMR1H
CHANGING BETWEEN
CAPTURE PRESCALERS
(CCP2 SHOWN)
; Turn CCP module off
; Load WREG with the
; new prescaler mode
; value and CCP ON
; Load CCP2CON with
; this value
CCPR1L
CCPR2L
TMR1L
TMR1L
DS39682B-page 125