PIC18F25K22-I/SO Microchip Technology Inc., PIC18F25K22-I/SO Datasheet - Page 395
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F25K22-I/SO
Manufacturer Part Number
PIC18F25K22-I/SO
Description
32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP, 28 SOIC .300in TUBE
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F45K22-IP.pdf
(496 pages)
Specifications of PIC18F25K22-I/SO
A/d Inputs
17-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F25K22-I/SO
Manufacturer:
MICROCHIP
Quantity:
3 000
Company:
Part Number:
PIC18F25K22-I/SO
Manufacturer:
MICROCHIP
Quantity:
7
Part Number:
PIC18F25K22-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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NEGF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
2010 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register ‘f’
Negate f
NEGF
0 f 255
a [0,1]
( f ) + 1 f
N, OV, C, DC, Z
Location ‘f’ is negated using two’s
complement. The result is placed in the
data memory location ‘f’.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 25.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode”
1
1
NEGF
Read
0110
Q2
0011 1010 [3Ah]
1100 0110 [C6h]
f {,a}
REG, 1
110a
Process
Data
Q3
ffff
for details.
register ‘f’
Write
Q4
ffff
Preliminary
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
None.
Q Cycle Activity:
PIC18(L)F2X/4XK22
Decode
Q1
operation
No Operation
NOP
None
No operation
None
No operation.
1
1
0000
1111
Q2
No
0000
xxxx
operation
Q3
No
DS41412D-page 395
0000
xxxx
operation
Q4
No
0000
xxxx
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