PIC18F25K22-I/SO Microchip Technology Inc., PIC18F25K22-I/SO Datasheet - Page 357
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PIC18F25K22-I/SO
Manufacturer Part Number
PIC18F25K22-I/SO
Description
32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP, 28 SOIC .300in TUBE
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F45K22-IP.pdf
(496 pages)
Specifications of PIC18F25K22-I/SO
A/d Inputs
17-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Part Number:
PIC18F25K22-I/SO
Manufacturer:
MICROCHIP
Quantity:
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Part Number:
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Part Number:
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Quantity:
20 000
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REGISTER 24-9:
REGISTER 24-10: CONFIG7L: CONFIGURATION REGISTER 7 LOW
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5
bit 4-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
WRTD
R/C-1
U-0
—
This bit is read-only in normal execution mode; it can be written only in Program mode.
Available on PIC18(L)FX5K22 and PIC18(L)FX6K22 devices.
WRTD: Data EEPROM Write Protection bit
1 = Data EEPROM not write-protected
0 = Data EEPROM write-protected
WRTB: Boot Block Write Protection bit
1 = Boot Block not write-protected
0 = Boot Block write-protected
WRTC: Configuration Register Write Protection bit
1 = Configuration registers not write-protected
0 = Configuration registers write-protected
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
EBTR3: Table Read Protection bit
1 = Block 3 not protected from table reads executed in other blocks
0 = Block 3 protected from table reads executed in other blocks
EBTR2: Table Read Protection bit
1 = Block 2 not protected from table reads executed in other blocks
0 = Block 2 protected from table reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 not protected from table reads executed in other blocks
0 = Block 1 protected from table reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 not protected from table reads executed in other blocks
0 = Block 0 protected from table reads executed in other blocks
WRTB
R/C-1
U-0
—
CONFIG6H: CONFIGURATION REGISTER 6 HIGH
WRTC
R-1
U-0
—
(1)
U-0
U-0
(1)
(1)
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
EBTR3
R/C-1
U-0
—
PIC18(L)F2X/4XK22
(1)
(1)
EBTR2
R/C-1
U-0
—
(1)
EBTR1
R/C-1
U-0
—
DS41412D-page 357
EBTR0
R/C-1
U-0
—
bit 0
bit 0
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