PIC12F683-E/P Microchip Technology Inc., PIC12F683-E/P Datasheet - Page 71

• Manufacturer Part Number: PIC12F683-E/P
• Description: 8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O, PDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F683-E/P

• A/d Inputs: 4 Channel, 10-Bit
• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 6
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Serial Interface: None
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

11.0
The Capture/Compare/PWM (CCP) module contains a
16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Capture/Compare/PWM
comprised of two 8-bit registers: CCPR1L (low byte)
and CCPR1H (high byte). The CCP1CON register
controls the operation of CCP. The special event trigger
is generated by a compare match and will clear both
TMR1H and TMR1L registers.
REGISTER 11-1:
 2004 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULE
bit 7-6
bit 5-4
bit 3-0
CCP1CON – CCP CONTROL REGISTER 1 (ADDRESS: 15h)
bit 7
Unimplemented: Read as ‘0’
DC1B<1:0>: PWM Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M<3:0>: CCP1 Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set,
1011 = Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected);
11xx = PWM mode
Legend:
R = Readable bit
- n = Value at POR
Register
U-0
—
CCP1 pin is unaffected)
CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)
1
U-0
—
(CCPR1)
DC1B1
R/W-0
Preliminary
W = Writable bit
‘1’ = Bit is set
is
DC1B0
R/W-0
TABLE 11-1:
CCP Mode
CCP1M3
Compare
Capture
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PWM
CCP MODE – TIMER
RESOURCES REQUIRED
CCP1M2 CCP1M1
R/W-0
PIC12F683
x = Bit is unknown
Timer Resource
R/W-0
DS41211B-page 69
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0