DSPIC30F2020-30I/SP Microchip Technology Inc., DSPIC30F2020-30I/SP Datasheet - Page 226

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DSPIC30F2020-30I/SP

Manufacturer Part Number
DSPIC30F2020-30I/SP
Description
DSP, 16-Bit, 12KB Flash, 512 RAM, 21 I/O, SDIP-28
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC30F2020-30I/SP

A/d Inputs
8-Channels, 10-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Ios
21
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
512 Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-5.5
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
dsPIC30F1010/202X
TABLE 19-2:
DS70178C-page 224
Base
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Instr
#
EXCH
FBCL
FF1L
FF1R
GOTO
INC
INC2
IOR
LAC
LNK
LSR
MAC
MOV
MOVSAC
MPY
MPY.N
MSC
MUL
Mnemonic
Assembly
EXCH
FBCL
FF1L
FF1R
GOTO
GOTO
INC
INC
INC
INC2
INC2
INC2
IOR
IOR
IOR
IOR
IOR
LAC
LNK
LSR
LSR
LSR
LSR
LSR
MAC
MAC
MOV
MOV
MOV
MOV
MOV.b
MOV
MOV
MOV
MOV.D
MOV.D
MOVSAC
MPY
Wn,Acc,Wx,Wxd,Wy,Wyd
MPY
Wm,Acc,Wx,Wxd,Wy,Wyd
MPY.N
Wn,Acc,Wx,Wxd,Wy,Wyd
MSC
MUL.SS
MUL.SU
MUL.US
MUL.UU
MUL.SU
MUL.UU
MUL
INSTRUCTION SET OVERVIEW (CONTINUED)
Wns,Wnd
Ws,Wnd
Ws,Wnd
Ws,Wnd
Expr
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
Wso,#Slit4,Acc
#lit14
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
Wm *
Wn,Acc,Wx,Wxd,Wy,Wyd,
AWB
Wm *
Wm,Acc,Wx,Wxd,Wy,Wyd
f,Wn
f
f,WREG
#lit16,Wn
#lit8,Wn
Wn,f
Wso,Wdo
WREG,f
Acc,Wx,Wxd,Wy,Wyd,AWB
Wm *
Wm,Acc,Wx,Wxd,Wy,Wyd,
AWB
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,#lit5,Wnd
Wb,#lit5,Wnd
f
Assembly Syntax
Wns,Wd
Ws,Wnd
Wm *
Wm *
Wm *
Preliminary
Swap Wns with Wnd
Find Bit Change from Left (MSb) Side
Find First One from Left (MSb) Side
Find First One from Right (LSb) Side
Go to address
Go to indirect
f = f + 1
WREG = f + 1
Wd = Ws + 1
f = f + 2
WREG = f + 2
Wd = Ws + 2
f = f .IOR. WREG
WREG = f .IOR. WREG
Wd = lit10 .IOR. Wd
Wd = Wb .IOR. Ws
Wd = Wb .IOR. lit5
Load Accumulator
Link frame pointer
f = Logical Right Shift f
WREG = Logical Right Shift f
Wd = Logical Right Shift Ws
Wnd = Logical Right Shift Wb by Wns
Wnd = Logical Right Shift Wb by lit5
Multiply and Accumulate
Square and Accumulate
Move f to Wn
Move f to f
Move f to WREG
Move 16-bit literal to Wn
Move 8-bit literal to Wn
Move Wn to f
Move Ws to Wd
Move WREG to f
Move Double from W(ns):W(ns + 1) to Wd
Move Double from Ws to W(nd + 1):W(nd)
Prefetch and store accumulator
Multiply Wm by Wn to Accumulator
Square Wm to Accumulator
-(Multiply Wm by Wn) to Accumulator
Multiply and Subtract from Accumulator
{Wnd + 1, Wnd} = signed(Wb) * signed(Ws)
{Wnd + 1, Wnd} = signed(Wb) * unsigned(Ws)
{Wnd + 1, Wnd} = unsigned(Wb) * signed(Ws)
{Wnd + 1, Wnd} = unsigned(Wb) *
unsigned(Ws)
{Wnd + 1, Wnd} = signed(Wb) * unsigned(lit5)
{Wnd + 1, Wnd} = unsigned(Wb) *
unsigned(lit5)
W3:W2 = f * WREG
Description
© 2006 Microchip Technology Inc.
word
# of
s
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
cycles
# of
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
None
C
C
C
None
None
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
N,Z
N,Z
N,Z
N,Z
N,Z
OA,OB,OAB,
SA,SB,SAB
None
C,N,OV,Z
C,N,OV,Z
C,N,OV,Z
N,Z
N,Z
OA,OB,OAB,
SA,SB,SAB
OA,OB,OAB,
SA,SB,SAB
None
N,Z
N,Z
None
None
None
None
N,Z
None
None
None
OA,OB,OAB,
SA,SB,SAB
OA,OB,OAB,
SA,SB,SAB
None
OA,OB,OAB,
SA,SB,SAB
None
None
None
None
None
None
None
Status Flags
Affected

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