IDT82V2084PFG8 IDT, Integrated Device Technology Inc, IDT82V2084PFG8 Datasheet - Page 57

• Manufacturer Part Number: IDT82V2084PFG8
• Description: IC LINE INTERFC UNIT 4CH 128TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Line Interface Units (LIUs)r

Specifications of IDT82V2084PFG8

• Protocol: E1
• Voltage - Supply: 3.13 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 800-1864-2; 82V2084PFG8

QUAD CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
Table-58 TAP Controller State Description (Continued)
Update-IR
Pause-IR
Exit2-IR
STATE
The pause state allows the test controller to temporarily halt the shifting of data through the instruction register. The test data register
This is a temporary state. While in this state, if TMS is held high, a rising edge applied to TCK causes the controller to enter the Update-IR
The instruction shifted into the instruction register is latched into the parallel output from the shift-register path on the falling edge of TCK.
selected by the current instruction retains its previous value and the instruction does not change during this state. The controller remains in
this state as long as TMS is low. When TMS goes high and a rising edge is applied to TCK, the controller moves to the Exit2-IR state.
state, which terminates the scanning process. If TMS is held low and a rising edge is applied to TCK, the controller enters the Shift-IR state.
The test data register selected by the current instruction retains its previous value and the instruction does not change during this state.
When the new instruction has been latched, it becomes the current instruction. The test data registers selected by the current instruction
retain their previous value.
1
0
Test-logic Reset
Run Test/Idle
0
Figure-22 JTAG State Diagram
1
1
0
Capture-DR
Update-DR
Pause-DR
Select-DR
Exit1-DR
Exit2-DR
Shift-DR
1
57
1
0
1
0
0
1
0
DESCRIPTION
1
1
0
0
0
1
Capture-IR
Update-IR
Select-IR
Pause-IR
Exit1-IR
Exit2-IR
Shift-IR
1
1
0
0
0
1
1
0
1
0
1
0
TEMPERATURE RANGES
INDUSTRIAL