DS3251+ Maxim Integrated Products, DS3251+ Datasheet
DS3251+
Manufacturer Part Number
DS3251+
Description
IC LIU DS3/E3/STS-1 144-CSBGA
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Specifications of DS3251+
Number Of Drivers/receivers
1/1
Protocol
DS3
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
144-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
www.maxim-ic.com
GENERAL DESCRIPTION
The DS3251 (single), DS3252 (dual), DS3253
(triple), and DS3254 (quad) line interface units (LIUs)
perform the functions necessary for interfacing at the
physical layer to DS3, E3, or STS-1 lines. Each LIU
has independent receive and transmit paths and a
built-in jitter attenuator. An on-chip clock adapter
generates all line-rate clocks from a single input
clock. Control interface options include 8-bit parallel,
SPI, and hardware mode.
APPLICATIONS
SONET/SDH and PDH Multiplexers
Digital Cross-Connects
Access Concentrators
ATM and Frame Relay Equipment
Routers
PBXs
DSLAMs
CSU/DSUs
FUNCTIONAL DIAGRAM
LINE OUT
DS3, E3,
OR STS-1
LINE IN
DS3, E3,
OR STS-1
RXP
RXN
TXP
TXN
Semiconductor
EACH LIU
DS325x
Dallas
DATA
DATA
CLK
CLK
RECEIVE
CLOCK
AND DATA
CONTROL
STATUS
TRANSMIT
CLOCK
AND DATA
DS3251/DS3252/DS3253/DS3254
1 of 71
FEATURES
Features continued on page 5.
ORDERING INFORMATION
DS3251
DS3251N
DS3252
DS3252N
DS3253
DS3253N
DS3254
DS3254N
PART
Pin-Compatible Family of Products
Each Port Independently Configurable
Receive Clock and Data Recovery for Up to 380
meters (DS3), 440 meters (E3), or 360 meters
(STS-1) of 75Ω Coaxial Cable
Standards-Compliant Transmit Waveshaping
Three Control Interface Options: 8-Bit Parallel,
SPI, and Hardware Mode
Built-In Jitter Attenuators can be Placed in Either
the Receive or Transmit Paths
Jitter Attenuators Have Provisionable Buffer
Depth: 16, 32, 64, or 128 Bits
Built-In Clock Adapter Generates All Line-Rate
Clocks from a Single Input Clock (DS3, E3,
STS-1, OC-3, 19.44MHz, 38.88MHz,
77.76MHz)
B3ZS/HDB3 Encoding and Decoding
Minimal External Components Required
Local and Remote Loopbacks
Low-Power 3.3V Operation (5V Tolerant I/O)
Industrial Temperature Range: -40°C to +85°C
Small Package: 144-Pin, 13mm x 13mm
Thermally Enhanced CSBGA
Drop-In Replacement for DS3151/52/53/54 LIUs
IEEE 1149.1 JTAG Support
Single/Dual/Triple/Quad
LIU
1
1
2
2
3
3
4
4
DS3/E3/STS-1 LIUs
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
REV: 030106
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