DSPIC30F3014-30I/P Microchip Technology Inc., DSPIC30F3014-30I/P Datasheet - Page 149

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DSPIC30F3014-30I/P

Manufacturer Part Number
DSPIC30F3014-30I/P
Description
DSP, 16-Bit, 24 KB Flash, 2KB RAM, 30 I/O, PDIP-40
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC30F3014-30I/P

A/d Inputs
13-Channels, 12-Bit
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
30
Interface
CAN, I2C, SPI, UART/USART
Ios
30
Memory Type
Flash
Number Of Bits
16
Package Type
40-pin PDIP
Programmable Memory
24K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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20.4.1.1
The oscillator start-up circuitry is not linked to the POR
circuitry.
frequency crystals) have a relatively long start-up time.
Therefore, one or more of the following conditions is
possible after the POR timer and the PWRT have
expired:
• The oscillator circuit has not begun to oscillate.
• The Oscillator Start-up Timer has not expired (if a
• The PLL has not achieved a LOCK (if PLL is
If the FSCM is enabled and one of the above conditions
is true, a clock failure trap occurs. The device automat-
ically switches to the FRC oscillator and the user can
switch to the desired crystal oscillator in the trap ISR.
20.4.1.2
If the FSCM is disabled and the Power-up Timer
(PWRT) is also disabled, then the device exits rapidly
from Reset on power-up. If the clock source is FRC,
LPRC, ERC or EC, it will be active immediately.
If the FSCM is disabled and the system clock has not
started, the device will be in a frozen state at the Reset
vector until the system clock starts. From the user’s
perspective, the device appears to be in Reset until a
system clock is available.
20.4.2
The BOR (Brown-out Reset) module is based on an
internal voltage reference circuit. The main purpose of
the BOR module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (i.e.,
missing portions of the AC cycle waveform due to bad
power transmission lines, or voltage sags due to exces-
sive current draw when a large inductive load is turned
on).
The BOR module allows selection of one of the
following voltage trip points (see Table 23-11):
• 2.6V-2.71V
• 4.1V-4.4V
• 4.58V-4.73V
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source based on the
device Configuration bit values (FOS<2:0> and
FPR<4:0>). Furthermore, if an Oscillator mode is
selected, the BOR activates the Oscillator Start-up
© 2007 Microchip Technology Inc.
crystal oscillator is used).
used).
Note:
Some
BOR: PROGRAMMABLE
BROWN-OUT RESET
The BOR voltage trip points indicated here
are nominal values provided for design
guidance only. Refer to the Electrical
Specifications in the specific device data
sheet for BOR voltage limit specifications.
POR with Long Crystal Start-up Time
Operating without FSCM and PWRT
(with FSCM Enabled)
crystal
circuits
(especially
low
Timer (OST). The system clock is held until OST
expires. If the PLL is used, then the clock is held until
the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the POR time-out (T
time-out (T
released. If T
used, then a nominal delay of T
The total delay in this case is (T
The BOR Status bit (RCON<1>) is set to indicate that a
BOR has occurred. The BOR circuit, if enabled, contin-
ues to operate while in Sleep or Idle modes and resets
the device should V
voltage.
FIGURE 20-6:
Note 1:
Note:
dsPIC30F3014/4013
2:
3:
PWRT
Dedicated supervisory devices, such as
the MCP1XX and MCP8XX, may also be
used as an external Power-on Reset
circuit.
External Power-on Reset circuit is required
only if the V
The diode D helps discharge the capacitor
quickly when V
R should be suitably chosen so as to make
sure that the voltage drop across R does not
violate the device’s electrical specifications.
R1 should be suitably chosen so as to limit
any current flowing into MCLR from external
capacitor C, in the event of MCLR/V
breakdown due to Electrostatic Discharge
(ESD), or Electrical Overstress (EOS).
D
PWRT
) are applied before the internal Reset is
V
DD
= 0 and a crystal oscillator is being
R
C
DD
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
DD
fall below the BOR threshold
power-up slope is too slow.
DD
R1
powers down.
FSCM
POR
DD
POR
+ T
dsPIC30F
DS70138E-page 147
MCLR
= 100 μs is applied.
POWER-UP)
) and the PWRT
FSCM
).
PP
pin

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