DSPIC30F3014-30I/P Microchip Technology Inc., DSPIC30F3014-30I/P Datasheet - Page 104
DSPIC30F3014-30I/P
Manufacturer Part Number
DSPIC30F3014-30I/P
Description
DSP, 16-Bit, 24 KB Flash, 2KB RAM, 30 I/O, PDIP-40
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F3014-30IP.pdf
(220 pages)
Specifications of DSPIC30F3014-30I/P
A/d Inputs
13-Channels, 12-Bit
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
30
Interface
CAN, I2C, SPI, UART/USART
Ios
30
Memory Type
Flash
Number Of Bits
16
Package Type
40-pin PDIP
Programmable Memory
24K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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dsPIC30F3014/4013
16.9
To allow the system to determine baud rates of
received characters, the input can be optionally linked
to a capture input (IC1 for UART1, IC2 for UART2). To
enable this mode, the user must program the input
capture module to detect the falling and rising edges of
the Start bit.
16.10 UART Operation During CPU
16.10.1
When the device enters Sleep mode, all clock sources
to the module are shut down and stay at logic ‘0’. If
entry into Sleep mode occurs while a transmission is in
progress, then the transmission is aborted. The UxTX
pin is driven to logic ‘1’. Similarly, if entry into Sleep
mode occurs while a reception is in progress, then the
reception is aborted. The UxSTA, UxMODE, transmit
and receive registers and buffers, and the UxBRG
register are not affected by Sleep mode.
If the WAKE bit (UxMODE<7>) is set before the device
enters Sleep mode, a falling edge on the UxRX pin
generates a receive interrupt. The Receive Interrupt
Select mode bit (URXISEL) has no effect for this func-
tion. If the receive interrupt is enabled, this wakes the
device up from Sleep. The UARTEN bit must be set in
order to generate a wake-up interrupt.
DS70138E-page 102
Auto-Baud Support
Sleep and Idle Modes
UART OPERATION DURING CPU
SLEEP MODE
16.10.2
For the UART, the USIDL bit determines if the module
stops or continues operation when the device enters
Idle mode. If USIDL = 0, the module continues
operation during Idle mode. If USIDL = 1, the module
stops on Idle.
UART OPERATION DURING CPU
IDLE MODE
© 2007 Microchip Technology Inc.
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