ICS1893CKILF IDT, Integrated Device Technology Inc, ICS1893CKILF Datasheet - Page 77

PHYCEIVER LOW PWR 3.3V 56-MLF2

ICS1893CKILF

Manufacturer Part Number
ICS1893CKILF
Description
PHYCEIVER LOW PWR 3.3V 56-MLF2
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet

Specifications of ICS1893CKILF

Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
56-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
1893CKILF
800-1023

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS1893CKILF
Manufacturer:
IDT
Quantity:
206
Part Number:
ICS1893CKILFT
Manufacturer:
ST
Quantity:
785
Part Number:
ICS1893CKILFT
Manufacturer:
ICS
Quantity:
20 000
7.13 Register 18: 10Base-T Operations Register
7.13.1 Remote Jabber Detect (bit 18.15)
ICS1893CF, Rev. K, 05/13/10
The 10Base-T Operations Register provides an STA with the ability to monitor and control the ICS1893CF
activity while the ICS1893CF is operating in 10Base-T mode.
Note:
1. For an explanation of acronyms used in
2. During any write operation to any bit in this register, the STA must write the default value to all
Table 7-20. 10Base-T Operations Register (register 18 [0x12])
The Remote Jabber Detect bit is provided to indicate that an ICS1893CF port has detected a Jabber
Condition on its receive path. This bit is reset to logic zero on a read of the 10Base-T operations register.
When this bit is logic:
This bit is a latching high bit. (For more information on latching high and latching low bits, see
7.1.4.1, “Latching High Bits”
Note:
18.15
18.14
18.13
18.12
18.11
18.10
18.9
18.8
18.7
18.6
18.5
18.4
18.3
18.2
18.1
18.0
Bit
Zero, it indicates a Jabber Condition has not occurred on the port’s receive path since either the last read
of this register or the last reset of the associated port.
One, it indicates a Jabber Condition has occurred on the port’s receive path since either the last read of
this register or the last reset of the associated port.
Reserved bits.
ICS1893CF Data Sheet Rev. J - Release
This bit is provided for information purposes only (that is, no actions are taken by the port). The
ISO/IEC specification defines the Jabber Condition in terms of a port’s transmit path. To set this bit,
an ICS1893CF port monitors its receive path and applies the ISO/IEC Jabber criteria to its receive
path.
Remote Jabber
Detect
Polarity reversed
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
Jabber inhibit
ICS reserved
Auto polarity inhibit
SQE test inhibit
Link Loss inhibit
Squelch inhibit
Definition
No Remote Jabber
Condition detected
Normal polarity
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Normal Jabber behavior
Read unspecified
Polarity automatically
corrected
Normal SQE test behavior
Normal Link Loss behavior Link Always = Link Pass
Normal squelch behavior
and
Copyright © 2009, Integrated Device Technology, Inc.
Section 7.1.4.2, “Latching Low
When Bit = 0
Table
All rights reserved.
77
7-20, see
Remote Jabber Condition
Detected
Polarity reversed
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Jabber Check disabled
Read unspecified
Polarity not automatically
corrected
SQE test disabled
No squelch
When Bit = 1
Chapter 1, “Abbreviations and
Bits”.)
Chapter 7 Management Register Set
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/1
cess
Ac-
RW
RW
RW
RW
RW
RO
RO
SF
LH
LH
Acronyms”.
Section
fault
De-
May, 2010
0
0
0
1
0
0
0
0
Hex
0

Related parts for ICS1893CKILF