AD9911BCPZ Analog Devices Inc, AD9911BCPZ Datasheet - Page 17

• Manufacturer Part Number: AD9911BCPZ
• Description: IC DDS 500MSPS DAC 10BIT 56LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9911BCPZ

• Resolution (bits): 10 b
• Master Fclk: 500MHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 1.71 V ~ 1.96 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-LFCSP
• Transmitting Current: 73mA
• Data Rate: 800Mbps
• Rf Ic Case Style: LFCSP
• No. Of Pins: 56
• Supply Voltage Range: 1.71V To 1.89V, 3.135V To 3.465V
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 3 - 168 Hours
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9911/PCBZ - BOARD EVAL FOR AD9911AD9911/PCB - BOARD EVAL FOR AD9911
• Lead Free Status / Rohs Status: Compliant

APPLICATION CIRCUITS
Figure 33. Synchronizing Multiple Devices to Increase Channel Capacity Using the AD9510 as a Clock Distributor for the Reference and SYNC Clock
REF CLK
n = DEPENDANT ON PRODUCT SELECTION.
REFERENCE
Figure 32. DDS in PLL Feedback Locking to Reference Offering Fine Frequency and Delay Adjust Tuning
CENTRAL
CONTROL
Figure 34. Clock Generation Circuit Using the AD951x Series of Clock Distribution Chips
÷
÷
AD9911
AD9510, AD9511, ADF4106
FPGA
FPGA
FPGA
FPGA
LPF
SOURCE
COMPARATOR
CLOCK
DELAY EQUALIZATION
PHASE
SYNCHRONIZATION
SYNC_CLK
SYNC_CLK
SYNC_CLK
DATA
DATA
DATA
DATA
CH 2
SYNC_CLK
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AD9510
AD9911
CLOCK DISTRIBUTOR
DELAY EQUALIZATION
LPF
CHARGE
PUMP
AD9510
WITH
DIVIDER AND DELAY ADJUST
PROGRAMMABLE 1 TO 32
REF CLK
REF_CLK
C1
S1
C2
S2
C3
S3
C4
S4
AD9515
AD9514
AD9513
AD9512
(MASTER)
AD9911
AD9911
(SLAVE 1)
AD9911
(SLAVE 2)
AD9911
(SLAVE 3)
FILTER
LOOP
SYNC_OUT
n
VCO
A1
A2
A3
A4
CLOCK OUTPUT
A_END
SELECTION(S)
LVPECL
CMOS
LVDS
AD9911