AD9858BSVZ Analog Devices Inc, AD9858BSVZ Datasheet - Page 29

IC DDS DAC 10BIT 1GSPS 100-TQFP

AD9858BSVZ

Manufacturer Part Number
AD9858BSVZ
Description
IC DDS DAC 10BIT 1GSPS 100-TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9858BSVZ

Design Resources
Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
Resolution (bits)
10 b
Master Fclk
1GHz
Tuning Word Width (bits)
32 b
Voltage - Supply
3.14 V ~ 3.47 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Pll Type
Frequency Synthesis
Frequency
1GHz
Supply Voltage Range
3.135 To 3.165V, 4.75V To 5.25V
Digital Ic Case Style
TQFP
No. Of Pins
100
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9858/TLPCBZ - BOARD EVAL TRANSLATION LOOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9858BSVZ
Manufacturer:
ADI
Quantity:
98
Part Number:
AD9858BSVZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD9858BSVZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
OUTLINE DIMENSIONS
WARNING
The TQFP_EP (thermal slug) must be attached to the ground plane or some other large metal mass for thermal transfer. Failure to do so
may cause excessive die temperature rise and damage to the device.
ORDERING GUIDE
Model
AD9858BSV
AD9858BSVZ
AD9858/PCBZ
AD9858/FDPCB
AD9858/TLPCBZ
1
Z = RoHS Compliant Part.
1
1
1
SEATING
PLANE
0.75
0.60
0.45
0.20
0.09
MAX
1.20
3.5°
Temperature Range
–40°C to +85°C
–40°C to +85°C
25
1
100
26
0.50 BSC
16.00 BSC SQ
PIN 1
Figure 40. 100-Lead Thin Quad Flat Package, Exposed Pad [TQFP_EP]
(PINS DOWN)
TOP VIEW
COMPLIANT TO JEDEC STANDARDS MS-026-AED-HD
14.00 BSC SQ
0.27
0.22
0.17
Dimensions shown in millimeters
0.15
0.05
Rev. C | Page 29 of 32
50
76
75
51
Package Description
100-Lead TQFP_EP
100-Lead TQFP_EP
Generic Evaluation Board
Fractional Divide Evaluation Board
Translation Loop Evaluation Board
(SV-100-1)
1.05
1.00
0.95
COPLANARITY
0.08
75
51
76
50
BOTTOM VIEW
CONDUCTIVE
HEAT SINK
(PINS UP)
NOM
6.50
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
100
26
1
25
Package Option
SV-100-1
SV-100-1
AD9858

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