AD9858BSVZ Analog Devices Inc, AD9858BSVZ Datasheet - Page 2

• Manufacturer Part Number: AD9858BSVZ
• Description: IC DDS DAC 10BIT 1GSPS 100-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9858BSVZ

• Design Resources: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
• Resolution (bits): 10 b
• Master Fclk: 1GHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 3.14 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Pll Type: Frequency Synthesis
• Frequency: 1GHz
• Supply Voltage Range: 3.135 To 3.165V, 4.75V To 5.25V
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9858/TLPCBZ - BOARD EVAL TRANSLATION LOOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9858
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Electrical Specifications ................................................................... 3
Absolute Maximum Ratings ............................................................ 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 14
REVISION HISTORY
2/09—Rev. B to Rev. C
Changes to Features Section, General Description Section, and
Figure 1 .............................................................................................. 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 6
Added Thermal Performance Section ........................................... 6
Changes to Figure 3, Figure 4, and Figure 5.................................. 9
Changes to Figure 9, Figure 10 Caption, Figure 11 Caption,
Figure 13, and Figure 14 ................................................................ 10
Changes to Figure 17 ...................................................................... 11
Changes to Theory of Operation Section and DAC Output
Section .............................................................................................. 14
Changes to Charge Pump Section ................................................ 15
Changes to Modes of Operation Section ..................................... 16
Changes to Single-Tone Mode Section and Frequency Sweeping
Mode Section................................................................................... 17
Changes to SYNCLK and FUD Pins Section and Figure 33 ..... 18
Changes to I/O Port Functionality Section, Parallel
Programming Mode Section, and Figure 35 ............................... 20
Changes to Figure 36 and Serial Programming
Mode Section................................................................................... 21
Changes to Table 6 .......................................................................... 22
Changes to Control Function Register (CFR) Section .............. 23
Changes to CFR[21]: Load Delta Frequency Timer Section .... 24
Changed CFR[14]: Sine/Cosine Select Bit Section to CFR[14]:
Enable Sine Output Bit Section ..................................................... 24
Thermal Performance .................................................................. 6
Explanation of Test Levels ........................................................... 6
ESD Caution .................................................................................. 6
Rev. C | Page 2 of 32
Register Map ................................................................................... 22
Applications Information .............................................................. 27
Outline Dimensions ....................................................................... 29
Changes to Delta Frequency Tuning Word (DFTW) Section,
Delta Frequency Ramp Rate Word (DFRRW) Section, and
Phase Offset Control Section ........................................................ 25
Changes to Profile Selection Section ........................................... 26
Deleted Frequency Tuning Control Section ............................... 27
Changed AD9858 Application Suggestions Section to
Applications Information Section ................................................ 27
Changes to Table 13 ....................................................................... 28
Added Exposed Paddle Notation to Outline Dimensions ........ 29
4/07—Rev. A to Rev. B
Changed EPAD to TQFP_EP ............................................ Universal
Updated Outline Dimensions ....................................................... 31
11/03—Rev. 0 to Rev. A
Changes to Specifications ................................................................. 5
Moved ESD Caution to ..................................................................... 6
Moved Pin Configuration to ............................................................ 7
Moved Pin Function Description to ............................................... 8
Changes to Equations .................................................................... 19
Changes to Delta Frequency Ramp Rate Word (DFRRW) ....... 27
4/03—Revision 0: Initial Version
Component Blocks ..................................................................... 14
Modes of Operation ................................................................... 16
Synchronization .......................................................................... 18
Programming the AD9858 ........................................................ 19
Register Bit Descriptions ........................................................... 23
Other Registers ........................................................................... 25
User Profile Registers ................................................................. 25
Evaluation Boards ...................................................................... 28
Warning ....................................................................................... 29
Ordering Guide .......................................................................... 29