AD9858BSVZ Analog Devices Inc, AD9858BSVZ Datasheet - Page 11

• Manufacturer Part Number: AD9858BSVZ
• Description: IC DDS DAC 10BIT 1GSPS 100-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9858BSVZ

• Design Resources: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
• Resolution (bits): 10 b
• Master Fclk: 1GHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 3.14 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Pll Type: Frequency Synthesis
• Frequency: 1GHz
• Supply Voltage Range: 3.135 To 3.165V, 4.75V To 5.25V
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9858/TLPCBZ - BOARD EVAL TRANSLATION LOOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Figure 15. Residual Phase Noise, 103 MHz f
0
0
0
Figure 16. Fractional Divider Loop Residual Phase Noise,
1
CENTER 1.55GHz
REF LVL
Figure 17. Fractional Divider Loop SFDR, f
10
10
0dBm
f
IN
= 115 MHz, f
100
100
DELTA 1 [T1]
f
OUT
1k
= 1550 MHz, BW = 1.5 MHz
0.00000000Hz
OUT
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
= 1550 MHz, Loop BW = 50 kHz
10k
0.0dB
150kHz/
10k
RBW
VBW
SWT
100k
100k
1kHz
1kHz
3.8s
1M
OUT
IN
, 1 GHz REFCLK
= 96.9 MHz,
RF ATT
UNIT
SPAN 1.5MHz
1M
10M
10dB
dBm
100M
10M
1AP
A
Rev. C | Page 11 of 32
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Figure 18. Residual Phase Noise, 403 MHz f
0
0
0
CENTER 1.55GHz
REF LVL
10
Figure 20. Fractional Divider Loop SFDR, f
10
0dBm
f
Figure 19. Translation Loop Residual Phase Nois,e
LO
= 1500 MHz, f
100
100
DELTA 1 [T1]
f
OUT
423.84769539kHz
1k
= 1550 MHz, BW = 1.5 MHz
1k
OUT
–56.76dB
FREQUENCY (Hz)
FREQUENCY (Hz)
= 1550 MHz, Loop BW = 50 kHz
10k
150kHz/
10k
1
RBW
VBW
SWT
100k
100k
2kHz
2kHz
940s
1M
OUT
IN
, 1 GHz REFCLK
RF ATT
UNIT
= 97.3 MHz,
1
SPAN 1.5MHz
1M
10M
AD9858
10dB
dBm
100M
10M
1AP
A