DP83953VUL National Semiconductor, DP83953VUL Datasheet - Page 41

IC CTRLR RIC REPEATER 160-PQFP

DP83953VUL

Manufacturer Part Number
DP83953VUL
Description
IC CTRLR RIC REPEATER 160-PQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83953VUL

Controller Type
Ethernet Repeater Interface Controller
Interface
IEEE 802.3
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
870mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-MQFP, 160-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP83953VUL

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5.0 HUB MANAGEMENT SUPPORT
Packet Status Register 0
Packet Status Register 1
D(7:2)
D(3:0)
Bit
D0
D1
Bit
D4
D5
D6
D7
D7
A5
PCOMPD
CRCER
Symbol
Symbol
PA(3:0)
A(5:0)
CRER
resv
D7
CLN
COL
FAE
D6
A4
FAE
D6
Reserved for future use: This bit is currently undefined.
Management software should not examine the state of this bit.
Packet Compression Done: If packet compression is utilized, this bit informs the user
that compression was performed, i.e., the packet was long enough to require
compression.
RIC2A Address (5:0): This address is defined by the user and is supplied when writing
to the RIC2A Address Register. It is used by hub management software to distinguish
between RIC2As in a multi-RIC2A system.
Port Address: This field defines the port which is receiving the packet.
Clean Receive: This bit is asserted provided no collision activity occurs during
repetition of the source and destination address fields, and the packet is of sufficient
size to contain these fields.
Collision: If a receive or transmit collision occurs during packet repetition the collision
bit is asserted.
Frame Alignment Error: This bit is asserted if a Frame Alignment Error occurred in
the repeated packet.
CRC Error: This bit is asserted if a CRC Error occurred in the repeated packet.
This status flag should not be tested if the COL bit is asserted since the error may be
simply due to the collision.
D5
A3
COL
D5
(Continued)
D4
A2
CLN
D4
41
PA3
D3
D3
A1
Description
Description
PA2
D2
D2
A0
PA1
D1
PCOMPD
D1
PA0
D0
resv
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D0

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