DP83953VUL National Semiconductor, DP83953VUL Datasheet - Page 38

• Manufacturer Part Number: DP83953VUL
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83953VUL

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 870mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83953VUL

5.0 HUB MANAGEMENT SUPPORT
2. The status flags that the RIC2A produces for the event
3. The RIC2A has an on-chip timer to indicate when, rela-
4. If packet compression is employed, the receive byte
5. Appending a status field to a data packet will obviously
Thus all of the other status fields can be correctly attrib-
uted to the relevant port.
counters or recording latches are supplied with each
packet [PSR(2)]. Additionally, the clean receive CLN sta-
tus is supplied to allow the user to determine the reliabil-
ity of the address fields in the packet. The CLN status bit
[PSR(1)] is set if no collisions are experienced during the
repetition of the address fields.
tive to the start of packet repetition, a collision, if any, oc-
curred [PSR(3)]. There is also a timer that indicates how
many bit times of IFG were seen on the network between
repetition of this packet and the preceding one. This is
provided by [PSR(6)].
count contained in the SONIC's packet descriptor will in-
dicate the number of bytes transferred over the manage-
ment bus rather than the number of bytes in the packet.
For this reason the RIC2A that receives the packet
counts the number of received bytes and transfers this
over the management bus [PSR(4),(5)].
result in a CRC error being flagged by the SONIC. For
this reason, the RIC2A monitors the repeated data
stream to check for CRC and FAE errors. In the case of
FAE errors, the RIC2A provides additional dummy data
bits so that the status fields are always byte aligned. For
packets of non-valid length the CRC and FAE error bits
are not set. Refer to Table 5 for a complete description
Max size<length<Jab size without CRC error
Length< Min. size packet without CRC error
Max size< length<Jab size with CRC error
Length<Min size packet with CRC error
Valid length packet with CRC error
Valid length packet w/o CRC error
Jab size packet without CRC error
Jab size packet with CRC error
Packet Length
Table 5. Relation of Packet Length to Jab Bit, CRCER bit and Learn
(Continued)
PSR2 Register
Jab Bit (D2) of
38
6. As a final check upon the effectiveness of the manage-
Figure 15 shows an example of a packet being transmitted
over the management bus. The first section of the diagram
(moving from left to right) shows a short preamble and SFD
pattern. The second region contains the packet's address
and the start of the data fields. At this time, logic on the
processor/SONIC card would determine if packet compres-
sion should be used on this packet. If the PCOMP signal is
asserted, then packet transfer will stop when the number of
bytes transmitted equals the value defined in the decode
register. Hence, the MRXC signal is idle for the remainder
of the packet's data and CRC fields. The final region shows
the transfer of the RIC2A's seven bytes of packet status.
The following pages describe the Hub Management regis-
ters that constitute the management status field.
Note that Packet Status Register 5 (PSR5) can be config-
ured to remain identical in the RIC2A as in the RIC, or
PSR5 can be modified to include the RUNT and SAM
(source address mismatch) information. PSR5 register bit
allocation is determined by the value of bit D2, MPS (Mod-
ify Packet Status), in the Global Security Register. When
the MPS bit is set, PSR5 register is modified.
of actions relating packet length to the setting of the Jab
and CRC bits, and learn functions.
ment interface, the RIC2A transfers a bus specific status
bit to the SONIC. This flag Packet Compress Done
PCOMPD [PSR(0)], may be monitored by hub manage-
ment software to check if the packet compression oper-
ation is enabled.
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of PSR1 Register
CRCER Bit (D7)
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Learn
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