DS21FF44 Maxim Integrated Products, DS21FF44 Datasheet - Page 17

• Manufacturer Part Number: DS21FF44
• Description: IC FRAMER E1 4X4 16CH 300-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21FF44

• Controller Type: E1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 300mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 300-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5. DS21Q44 DIE DESCRIPTION
FEATURES
§ Four E1 (CEPT or PCM-30)/ISDN-PRI
§ All four framers are fully independent;
§
§ Each of the four framers contain dual two-
§ 8-bit parallel control port that can be used
§ Easy access to Si and Sa bits
§ Extracts and inserts CAS signaling
§ Large counters for bipolar and code
§ Programmable output clocks for Fractional
§
§ Detects and generates AIS, remote alarm,
§ Pin compatible with DS21Q42 enhanced
§ 3.3V supply with 5V tolerant I/O; low-power
§ Available in 128-pin TQFP package
§ IEEE 1149.1 support
DESCRIPTION
The DS21Q44 E1 is an enhanced version of the DS21Q43 quad E1 framer. The DS21Q44 contains four
framers that are configured and read through a common microprocessor-compatible parallel port. Each
framer consists of a receive framer, receive elastic store, transmit formatter, and transmit elastic store. All
four framers in the DS21Q44 are totally independent; they do not share a common framing synchronizer.
The transmit and receive sides of each framer are also totally independent. The dual two-frame elastic
stores contained in each of the four framers can be independently enabled and disabled as required.
The device fully meets all of the latest E1 specifications including CCITT/ITU G.704, G.706, G.962, and
I.431 as well as ETS 300 011 and ETS 300 233.
framing transceivers
transmit and receive sections of each framer
are fully independent
Frames to FAS, CAS, CCS, and CRC4 formats
frame elastic store slip buffers that can
connect to asynchronous backplanes up to
8.192MHz
directly on either multiplexed or
nonmultiplexed buses (Intel or Motorola)
violations, CRC4 code word errors, FAS
word errors, and E-bits
E1, per channel loopback, H0 and H12
applications
Integral HDLC controller with 64-byte buffers
configurable for Sa bits or DS0 operation
and remote multiframe alarms
quad T1 framer
CMOS
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FUNCTIONAL DIAGRAM
FRAMER #0
FRAMER #1
Form atter
Transm it
FRAMER #2
Receive
Fram er
FRAMER #3
Control Port
Elastic
Elastic
Store
Store