CY7C68034-56LFXC Cypress Semiconductor Corp, CY7C68034-56LFXC Datasheet - Page 19

• Manufacturer Part Number: CY7C68034-56LFXC
• Description: IC USB NX2LP NAND CNTRLR 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C68034-56LFXC

• Controller Type: USB 2.0 NAND Flash Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 43mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Controller Family/series: (8051) USB
• No. Of I/o's: 12
• Cpu Speed: 48MHz
• No. Of Timers: 3
• Digital Ic Case Style: QFN
• Supply Voltage Range: 3V To 3.6V
• Core Size: 8 Bit
• Program Memory Size: 15KB
• Embedded Interface Type: I2C, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3686 - DEV KIT USB 2.0 PER OLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document #: 001-04247 Rev. *D
Table 9. NX2LP-Flex Register Summary (continued)
Hex
E629 1
E62A 1
E62B 1
E62C 1
E62D 1
E62E 1
E62F 1
E630
H.S.
E630
F.S.
E631
H.S.
E631
F.S
E632
H.S.
E632
F.S
E633
H.S.
E633
F.S
E634
H.S.
E634
F.S
E635
H.S.
E635
F.S
E636
H.S.
E636
F.S
E637
H.S.
E637
F.S
E640 1
E641 1
E642 1
E643 1
E644 4
E648 1
E649 7
E650 1
E651 1
E652 1
E653 1
E654 1
E655 1
E656 1
E657 1
E658 1
E659 1
E65A 1
Note
8. The register can only be reset, it cannot be set.
Size Name
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
8
ECCRESET
ECC1B0
ECC1B1
ECC1B2
ECC2B0
ECC2B1
ECC2B2
EP2FIFOPFH
EP2FIFOPFH
EP2FIFOPFL
EP2FIFOPFL
EP4FIFOPFH
EP4FIFOPFH
EP4FIFOPFL
EP4FIFOPFL
EP6FIFOPFH
EP6FIFOPFH
EP6FIFOPFL
EP6FIFOPFL
EP8FIFOPFH
EP8FIFOPFH
EP8FIFOPFL
EP8FIFOPFL
reserved
EP2ISOINPKTS
EP4ISOINPKTS
EP6ISOINPKTS
EP8ISOINPKTS
reserved
INPKTEND
OUTPKTEND
INTERRUPTS
EP2FIFOIE
EP2FIFOIRQ
EP4FIFOIE
EP4FIFOIRQ
EP6FIFOIE
EP6FIFOIRQ
EP8FIFOIE
EP8FIFOIRQ
IBNIE
IBNIRQ
NAKIE
[8]
[7]
[7]
[7]
[7]
[7]
[7,8]
[7,8]
[7,8]
[7,8]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
Description
ECC Reset
ECC1 Byte 0 Address
ECC1 Byte 1 Address
ECC1 Byte 2 Address
ECC2 Byte 0 Address
ECC2 Byte 1 Address
ECC2 Byte 2 Address
Endpoint 2/slave FIFO
Programmable Flag H
Endpoint 2/slave FIFO
Programmable Flag H
Endpoint 2/slave FIFO
Programmable Flag L
Endpoint 2/slave FIFO
Programmable Flag L
Endpoint 4/slave FIFO
Programmable Flag H
Endpoint 4/slave FIFO
Programmable Flag H
Endpoint 4/slave FIFO
Programmable Flag L
Endpoint 4/slave FIFO
Programmable Flag L
Endpoint 6/slave FIFO
Programmable Flag H
Endpoint 6/slave FIFO
Programmable Flag H
Endpoint 6/slave FIFO
Programmable Flag L
Endpoint 6/slave FIFO
Programmable Flag L
Endpoint 8/slave FIFO
Programmable Flag H
Endpoint 8/slave FIFO
Programmable Flag H
Endpoint 8/slave FIFO
Programmable Flag L
Endpoint 8/slave FIFO
Programmable Flag L
EP2 (if ISO) IN Packets
per frame (1-3)
EP4 (if ISO) IN Packets
per frame (1-3)
EP6 (if ISO) IN Packets
per frame (1-3)
EP8 (if ISO) IN Packets
per frame (1-3)
Force IN Packet End
Force OUT Packet End
Endpoint 2 slave FIFO
Flag Interrupt Enable
Endpoint 2 slave FIFO
Flag Interrupt Request
Endpoint 4 slave FIFO
Flag Interrupt Enable
Endpoint 4 slave FIFO
Flag Interrupt Request
Endpoint 6 slave FIFO
Flag Interrupt Enable
Endpoint 6 slave FIFO
Flag Interrupt Request
Endpoint 8 slave FIFO
Flag Interrupt Enable
Endpoint 8 slave FIFO
Flag Interrupt Request
IN-BULK-NAK Interrupt
Enable
IN-BULK-NAK interrupt
Request
Endpoint Ping-NAK/IBN
Interrupt Enable
b7
x
LINE15
LINE7
COL5
LINE15
LINE7
COL5
DECIS
DECIS
PFC7
IN:PKTS[1]
OUT:PFC7
DECIS
DECIS
PFC7
IN: PKTS[1]
OUT:PFC7
DECIS
DECIS
PFC7
IN:PKTS[1]
OUT:PFC7
DECIS
DECIS
PFC7
IN: PKTS[1]
OUT:PFC7
AADJ
AADJ
AADJ
AADJ
Skip
Skip
0
0
0
0
0
0
0
0
0
0
EP8
b6
x
LINE14
LINE6
COL4
LINE14
LINE6
COL4
PKTSTAT
PKTSTAT
PFC6
IN:PKTS[0]
OUT:PFC6
PKTSTAT
PKTSTAT
PFC6
IN: PKTS[0]
OUT:PFC6
PKTSTAT
PKTSTAT
PFC6
IN:PKTS[0]
OUT:PFC6
PKTSTAT
PKTSTAT
PFC6
IN: PKTS[0]
OUT:PFC6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EP6
b5
x
LINE13
LINE5
COL3
LINE13
LINE5
COL3
IN:PKTS[2]
OUT:PFC12
OUT:PFC12 OUT:PFC11 OUT:PFC10 0
PFC5
PFC5
0
0
PFC5
PFC5
IN:PKTS[2]
OUT:PFC12
OUT:PFC12 OUT:PFC11 OUT:PFC10 0
PFC5
PFC5
0
0
PFC5
PFC5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EP8
EP8
EP4
b4
x
LINE12
LINE4
COL2
LINE12
LINE4
COL2
IN:PKTS[1]
OUT:PFC11
PFC4
PFC4
IN: PKTS[1]
OUT:PFC10
OUT:PFC10 OUT:PFC9 0
PFC4
PFC4
IN:PKTS[1]
OUT:PFC11
PFC4
PFC4
IN: PKTS[1]
OUT:PFC10
OUT:PFC10 OUT:PFC9 0
PFC4
PFC4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EP6
EP6
EP2
b3
x
LINE11
LINE3
COL1
LINE11
LINE3
COL1
IN:PKTS[0]
OUT:PFC10
PFC3
PFC3
IN: PKTS[0]
OUT:PFC9
PFC3
PFC3
IN:PKTS[0]
OUT:PFC10
PFC3
PFC3
IN: PKTS[0]
OUT:PFC9
PFC3
PFC3
0
0
0
0
EP3
EP3
EDGEPF
0
EDGEPF
0
EDGEPF
0
EDGEPF
0
EP4
EP4
EP1
CY7C68033/CY7C68034
b2
x
LINE10
LINE2
COL0
LINE10
LINE2
COL0
0
PFC2
PFC2
0
PFC2
PFC2
0
PFC2
PFC2
0
PFC2
PFC2
0
0
0
0
EP2
EP2
PF
PF
PF
PF
PF
PF
PF
PF
EP2
EP2
EP0
b1
x
LINE9
LINE1
LINE17
LINE9
LINE1
0
PFC9
PFC9
PFC1
PFC1
0
0
PFC1
PFC1
PFC9
PFC9
PFC1
PFC1
0
0
PFC1
PFC1
INPPF1
INPPF1
INPPF1
INPPF1
EP1
EP1
EF
EF
EF
EF
EF
EF
EF
EF
EP1
EP1
0
b0
x
LINE8
LINE0
LINE16
LINE8
LINE0
0
PFC8
IN:PKTS[2]
OUT:PFC8
PFC0
PFC0
PFC8
PFC8
PFC0
PFC0
PFC8
IN:PKTS[2]
OUT:PFC8
PFC0
PFC0
PFC8
PFC8
PFC0
PFC0
INPPF0
INPPF0
INPPF0
INPPF0
EP0
EP0
FF
FF
FF
FF
FF
FF
FF
FF
EP0
EP0
IBN
Page 19 of 33
Default
00000000 W
00000000 R
00000000 R
00000000 R
00000000 R
00000000 R
00000000 R
10001000 bbbbbrbb
10001000 bbbbbrbb
00000000 RW
00000000 RW
10001000 bbrbbrrb
10001000 bbrbbrrb
00000000 RW
00000000 RW
00001000 bbbbbrbb
00001000 bbbbbrbb
00000000 RW
00000000 RW
00001000 bbrbbrrb
00001000 bbrbbrrb
00000000 RW
00000000 RW
00000001 brrrrrbb
00000001 brrrrrrr
00000001 brrrrrbb
00000001 brrrrrrr
xxxxxxxx W
xxxxxxxx W
00000000 RW
00000000 rrrrrbbb
00000000 RW
00000000 rrrrrbbb
00000000 RW
00000000 rrrrrbbb
00000000 RW
00000000 rrrrrbbb
00000000 RW
00xxxxxx rrbbbbbb
00000000 RW
Access