CY7C68300C-56PVXC Cypress Semiconductor Corp, CY7C68300C-56PVXC Datasheet - Page 15

• Manufacturer Part Number: CY7C68300C-56PVXC
• Description: IC USB 2.0 BRIDGE AT2LP 56-SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: USB to ATA/ATAPI Bridger

Specifications of CY7C68300C-56PVXC

• Package / Case: 56-SSOP
• Controller Type: USB 2.0 Controller
• Interface: I²C
• Voltage - Supply: 3.15 V ~ 3.45 V
• Current - Supply: 50mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Bits: 48
• Operating Temperature Range: 0 C to + 70 C
• Supply Current: 10 mA
• Operating Supply Voltage: 3.3 V
• Controller Family/series: (8051) USB
• Core Size: 8 Bit
• No. Of I/o's: 6
• Embedded Interface Type: I2C, USB
• Digital Ic Case Style: SSOP
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Package Type: SSOP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4615B - KIT USB TO ATA REFERENCE DESIGN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2266-5; CY7C68300C-56PVXC

ATA Interface Pins
The ATA Interface pins must be connected to the corresponding
pins on an IDE connector or mass storage device. To enable
sharing of the IDE bus with other master devices, the AT2LP can
place all ATA Interface Pins in a High Z state whenever
VBUS_ATA_ENABLE is not asserted. Enabling this feature is
done by setting bit 4 of configuration address 0x08 to ‘1’.
Otherwise, the ATA bus is driven by the AT2LP to a default
inactive state whenever VBUS_ATA_ENABLE is not asserted.
Design practices for signal integrity as outlined in the
ATA/ATAPI-6 specification must be followed with systems that
use a ribbon cable interconnect between the AT2LP’s ATA
interface and the attached mass storage device, especially if
Ultra DMA Mode is used.
VBUS_ATA_ENABLE
VBUS_ATA_ENABLE is typically used to indicate to the AT2LP
that power is present on VBUS. This pin is polled by the AT2LP
at startup and then every 20 ms thereafter. If this pin is ‘0’, the
AT2LP releases the pull up on D+ as required by the USB
specification.
Also, if bit 4 of configuration address 0x08 is ‘1’, the ATA interface
pins are placed in a High Z state when VBUS_ATA_ENABLE is
‘0’. If bit 4 of configuration address 0x08 is ‘0’, the ATA interface
pins are still driven when VBUS_ATA_ENABLE is ‘0’.
ATAPUEN
This output can be used to control the required host pull up
resistors on the ATA interface in a bus powered design to
minimize unnecessary power consumption when the AT2LP is in
suspend. ATAPUEN is driven to ‘0’ when the ATA bus is inactive.
ATAPUEN is driven to ‘1’ when the ATA bus is active. ATAPUEN
is set to a High Z state along with all other ATA interface pins if
VBUS_ATA_ENABLE
functionality (bit 4 of configuration address 0x08) is enabled (0).
ATAPUEN can also be configured as a GPIO input. See
HID Functions for Button Controls on page 15
information on HID functionality.
PWR500#
The AT2LP asserts PWR500# to indicate that VBUS current may
be drawn up to the limit specified by the bMaxPower field of the
USB configuration descriptors. If the AT2LP enters a low-power
state, PWR500# is deasserted. When normal operation is
resumed, PWR500# is restored. The PWR500# pin must never
be used to control power sources for the AT2LP. In the 56-pin
package, PWR500# only functions during bus powered
operation.
PWR500# can also be configured as a GPIO input. See
HID Functions for Button Controls on page 15
information on HID functionality.
VBUSPWRD
VBUSPWRD is used to indicate self or bus powered operation.
Some designs require the ability to operate in either self- or bus
powered modes. The VBUSPWRD input pin enables these
devices to switch between self powered and bus powered modes
by changing the contents of the bMaxPower field and the self
powered bit in the reported configuration descriptors (see
Table
Document Number: 001-05809 Rev. *H
4).
is
deasserted
and
the
for more
for more
ATA_EN
Note that current USB host drivers do not poll the device for this
information, so the effect of this pin is only seen on a USB or
power on reset.
Table 4. Behavior of Descriptor Data that is Dependent Upon
VBUSPWRD State
RESET#
Asserting RESET# for 10 ms resets the entire AT2LP. In self
powered designs, this pin is normally tied to V
resistor, and to GND through a 0.1 F capacitor, as shown in
Figure
Cypress does not recommend an RC reset circuit for bus
powered devices because of the potential for VBUS voltage
drop, which may result in a startup time that exceeds the USB
limit.
FX2/AT2/SX2 Reset and Power Considerations, at
www.cypress.com, for more information.
While the AT2LP is in reset, all pins are held at their default
startup state.
HID Functions for Button Controls
Cypress’s CY7C68320C/CY7C68321C has the capability of
supporting Human Interface Device (HID) signaling to the host.
If there is an HID descriptor in the configuration data, the GPIO
pins that are set as inputs are polled by the AT2LP logic
approximately every 17 ms (depending on other internal interrupt
routines). If a change is detected in the state of any HID-enabled
GPIO, an HID report is sent through EP1 to the host. The report
format for byte 0 and byte 1 is shown in
The ability to add buttons to a mass storage solution opens new
applications for data backup and other device-side notification to
the host. The AT2LP Blaster software, found in the CY4615C
bmAttributes
bMaxPower
Figure 8. R/C Reset Circuit for Self Powered Designs
Reported
Reported
Value
Value
Bit 6
Pin
8.
Refer
VBUSPWRD = ‘1’
to
(bus powered)
100K
0.1F
CY7C68300C, CY7C68301C
CY7C68320C, CY7C68321C
(500 mA)
0xFA
the
‘0’
application
VBUSPWRD = ‘0’
RESET#
(self powered)
(2 mA)
0x01
‘1’
Table
note
CC
5.
titled
through a 100k
Page 15 of 44
bMaxPower 
bMaxPower 
address 0x34
VBUSPWRD
N/A (56-pin)
configuration
The value
is used.
0x01
0x01
from
‘0’ if
‘1’ if
EZ-USB
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