MCP2515-I/SO Microchip Technology, MCP2515-I/SO Datasheet - Page 36

IC CAN CONTROLLER W/SPI 18SOIC

MCP2515-I/SO

Manufacturer Part Number
MCP2515-I/SO
Description
IC CAN CONTROLLER W/SPI 18SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP2515-I/SO

Package / Case
18-SOIC (7.5mm Width)
Controller Type
CAN Interface
Interface
SPI
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
1 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage Range
2.7V To 5.5V
Driver Case Style
SOIC
No. Of Pins
18
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Supply Voltage Min
2.7V
Rohs Compliant
Yes
Clock Frequency
40MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP2515DM-BM - BOARD DEMO FOR MCP2515/51MCP2515DM-PTPLS - BOARD DAUGHTER PICTAIL MCP2515MCP2515DM-PCTL - BOARD DEMO FOR MCP2515DV251001 - KIT DEVELOPMENT CAN MCP2510
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MCP2515
REGISTER 4-15:
\
REGISTER 4-16:
REGISTER 4-17:
DS21801F-page 36
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-2
bit 1-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-0
R/W-0
R/W-0
EID15
SID2
EID7
SID: Standard Identifier Mask bits <2:0>
These bits hold the mask bits to be applied to bits<2:0> of the Standard Identifier portion of a received
message
Unimplemented: Reads as ‘0’
EID: Extended Identifier Mask bits <17:16>
These bits hold the mask bits to be applied to bits <17:16> of the Extended Identifier portion of a
received message
EID: Extended Identifier bits <15:8>
These bits hold the filter bits to be applied to bits <15:8> of the Extended Identifier portion of a received
message
EID: Extended Identifier Mask bits <7:0>
These bits hold the mask bits to be applied to the bits <7:0> of the Extended Identifier portion of a
received message
R/W-0
R/W-0
EID14
R/W-0
SID1
EID6
RXMnSIDL – MASK n STANDARD IDENTIFIER LOW
(ADDRESS: 21h, 25h)
RXMnEID8 – MASK n EXTENDED IDENTIFIER HIGH
(ADDRESS: 22h, 26h)
RXMnEID0 – MASK n EXTENDED IDENTIFIER LOW
(ADDRESS: 23h, 27h)
W = Writable bit
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
‘1’ = Bit is set
R/W-0
R/W-0
EID13
R/W-0
SID0
EID5
R/W-0
R/W-0
EID12
EID4
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
EID11
R/W-0
EID3
U-0
R/W-0
EID10
R/W-0
EID2
U-0
© 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-0
EID17
R/W-0
R/W-0
EID9
EID1
R/W-0
R/W-0
R/W-0
EID16
EID8
EID0
bit 0
bit 0
bit 0

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