STLC5046 STMicroelectronics, STLC5046 Datasheet - Page 17

IC CODEC/FLTR PROG QUAD 64-TQFP

STLC5046

Manufacturer Part Number
STLC5046
Description
IC CODEC/FLTR PROG QUAD 64-TQFP
Manufacturer
STMicroelectronics
Type
PCM Codec/Filterr
Datasheets

Specifications of STLC5046

Data Interface
PCM Audio Interface
Resolution (bits)
16 b
Number Of Adcs / Dacs
4 / 4
Sigma Delta
Yes
Voltage - Supply, Analog
3.3 V ~ 5 V
Voltage - Supply, Digital
3.3 V ~ 5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-3665

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STLC5046
Manufacturer:
ST
Quantity:
2 282
Part Number:
STLC5046
Manufacturer:
ST
Quantity:
4
Part Number:
STLC5046
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STLC5046
Manufacturer:
ST
0
Part Number:
STLC5046
Manufacturer:
ST
Quantity:
20 000
Part Number:
STLC5046 BCP
Manufacturer:
ST
0
Part Number:
STLC5046-1LF
Manufacturer:
ST
0
Part Number:
STLC5046-BCA
Manufacturer:
ST
0
Part Number:
STLC5046BCL
Manufacturer:
TOSHIBA
Quantity:
800
Part Number:
STLC5046BCP
Manufacturer:
ST
Quantity:
1 900
STLC5046
2.7
CS, normally High, is set Low during the transmission / reception of a byte, lasting 8CCLK
pulses.
Though, in general, two bytes of the same instruction take two CS separated cycles,
STLC5046 can handle the data transfer in a single 16 CCLK CS cycle, in both the directions.
One additional wire provided to the control interface is an open drain interrupt output (INT)
that goes low when a change of status is detected on the I/O pins.
SLIC control interface
The device provides 12 I/O pins plus 4 CS signals. The interface can work in dynamic or
static mode: it can be selected by means of DIR register.
Dynamic Mode: the I/O pins are configured as input or output by means of DIR register.
The CS signals are used to select the different SLIC interface. In this case the I/O pin
can be multiplexed. The data loaded from SLIC#n via I/O pins configured as input can
be read in the DATAn register. The data written in a DATAn register will be loaded on the
I/O pins configured as output when the Csn signal will be active.
Static Mode: The CS signal can be used as I/O pins. They can be configured as input
or output I/O by means of DATA1 register. The data corresponding to the CS signal can
be read or written by means of DATA2 register. All data related to th other I/O pins can
be read or written by means of DATA0 register.
Doc ID 7052 Rev 5
Functional description
17/51

Related parts for STLC5046