IDTSTAC9751XXTAEC1XR IDT, Integrated Device Technology Inc, IDTSTAC9751XXTAEC1XR Datasheet - Page 28

• Manufacturer Part Number: IDTSTAC9751XXTAEC1XR
• Description: IC CODEC AC'97 2CH VALUE 48-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9751XXTAEC1XR

• Resolution (bits): 18 b, 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 85 / 89
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9751XXTAEC1XR

IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
5.1.2.6.
Audio input frame slot 6 is the left channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with 0
to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.7.
Audio input frame slot 7 is the left channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with 0
to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.8.
Audio input frame slot 8 is the right channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with
0's to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.9.
Audio input frame slot 9 is the right channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with 0
to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.10. Slot 10: PCM Left Record Channel
Audio input frame slot 10 is the left channel output of STAC9750/9751 input MUX, post-ADC.
Slot 6: PCM Left Record Channel
Slot 7: PCM Left Record Channel
Slot 8: PCM Right Record Channel
Slot 9: PCM Right Record Channel
28
STAC9750/9751
PC AUDIO
V 5.8 103106