IDTSTAC9750XXTAEC1XR IDT, Integrated Device Technology Inc, IDTSTAC9750XXTAEC1XR Datasheet - Page 53

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IDTSTAC9750XXTAEC1XR

Manufacturer Part Number
IDTSTAC9750XXTAEC1XR
Description
IC CODEC AC'97 2CH VALUE 48-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet

Specifications of IDTSTAC9750XXTAEC1XR

Resolution (bits)
18 b, 20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
85 / 89
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9750XXTAEC1XR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTSTAC9750XXTAEC1XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
INT APOP
EN15
D15
EN7
D15
D7
D7
6.5.25.6. 72h Enable (70h)
Default: 0000h
6.5.25.7. Analog Current Adjust (72h)
Default: 0000h
The Analog Current Adjust register (index 72h) is a locked register and can only be properly written
and read from when ABBAh has been written into register 70h. The IBIASx bits allow the analog cur-
rent to be adjusted with minimal reduction in performance. A lower analog current setting is NOT
recommended when a 5V analog supply is used. A lower setting for 3.3V supplies is recommended
for notebook computers to reduce power consumption to its lowest level.
6.5.25.8. Internal Power-On/Off Anti-Pop Circuit
The STAC9750/9751 includes an internal power supply anti-pop circuit that prevents audible clicks
and pops from being heard when the CODEC is powered on and off. This function is accomplished
by delaying the charge/discharge of the VREF capacitor (Pin 27). C
turn-on delay of roughly 3 seconds, which will allow the power supplies to stabilize before the
CODEC outputs are enabled. The delay can be extended to 30 seconds if a value of C
10 µF is used. The CODEC outputs are also kept stable for the same amount of time at power-off to
allow the system to be gracefully turned off. The INT_APOP bit D7 of register 72h allows this delay
circuit to be bypassed for rapid production testing. Any external component anti-pop circuit is unaf-
fected by the internal circuit.
IBIAS1
0
0
1
1
EN14
EN6
D14
D14
D6
D6
EN13
EN5
D13
D13
D5
D5
Reserved
IBIAS0
0
1
0
1
Table 38. Analog Current Adjust
EN12
EN4
D12
D12
53
D4
D4
Reserved
EN11
EN3
D11
D11
D3
D3
120% of nominal Analog Current
140% of nominal Analog Current
80% of nominal Analog Current
STAC9750/9751
IBIAS1
EN10
EN2
D10
D10
Analog Current
D2
D2
Normal Current
VREF
value of 1 µF will cause a
IBIAS0
EN9
EN1
D9
D1
D9
D1
VREF
PC AUDIO
V 5.8 103106
RSVD
EN8
EN0
D8
D0
D8
D0
value of

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