IDTSTAC9750XXTAEC1XR IDT, Integrated Device Technology Inc, IDTSTAC9750XXTAEC1XR Datasheet - Page 47

• Manufacturer Part Number: IDTSTAC9750XXTAEC1XR
• Description: IC CODEC AC'97 2CH VALUE 48-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9750XXTAEC1XR

• Resolution (bits): 18 b, 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 85 / 89
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9750XXTAEC1XR

IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
6.5.17.
6.5.18.
Bit(s)
15:9
7:1
8
0
D15
D15
D7
D7
1. If pin 48 is held high at powerup, 28h D2 will be low indicating no SPDIF available and the regis-
2. Bits D15, D13-D00 of this register cannot be written to without first setting Reg 2Ah bit D2 = 0
Extended Modem Status and Control Register (3Eh)
Default: 0100h
GPIO Pin Configuration Register (4Ch)
Default: 0003h
Bit(s) Reset
10:4
3
2
1
0
ter 3Ah will then read back 0000h.
down. To Disable SPDIF, use an 1 KΩ-10 KΩ external pullup. Do NOT leave Pin 48 floating.
(SPDIF disabled) and Register 28h bit D2 = 1 (SPDIF available).
Read / Write
Read Only
Read Only
Read Only
Access
0
0
0
0
0
D14
D14
D6
D6
Read & Write
Read & Write
Read & Write
Read & Write
Read & Write
Access
Reset Value
0
1
0
0
Table 29. Extended Modem Status and Control
D13
D13
D5
D5
CC[6, 0]
/AUDIO
Reserved
COPY
Name
PRO
PRE
Table 28. SPDIF Control (Continued)
Reserved
Reserved
Reserved
Reserved
Name
GPIO
PRA
D12
D12
Category Code is defined by the IEC standard or as appropriate by
media.
0 = 0
1 = Pre-emphasis is 50/15
0 = Copyright not asserted
1 = Copyright is asserted
0 = PCM data
1 = Non-Audio or non-PCM format
0 = Consumer use of the channel
1 = Professional use of the channel
47
Pin 48: To Enable SPDIF, use an 1 KΩ-10 KΩ external pull-
D4
D4
Reserved
µ
sec Pre-emphasis
Bit not used, should read back 0
Bit not used, should read back 0
0 = GPIO powered up / enabled
1 = GPIO powered down / disabled
0 = GPIO not ready (powered down)
1 = GPIO ready (powered up)
D11
D11
D3
D3
Description (note 1-2)
µ
STAC9750/9751
sec
D10
D10
D2
D2
Description
(GPIO1)
GC1
D9
D1
D9
D1
PC AUDIO
(GPIO0)
V 5.8 103106
GPIO
PRA
GC0
D8
D0
D8
D0