MC68360ZP25L Freescale Semiconductor, MC68360ZP25L Datasheet - Page 660

IC MPU QUICC 25MHZ 357-PBGA

MC68360ZP25L

Manufacturer Part Number
MC68360ZP25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor

Specifications of MC68360ZP25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Parallel Interface Port (PIP)
The BUSY signal is multiplexed onto PB0; therefore, it is not possible to use the BUSY sig-
nal with a full 16-bit PIP interface. BUSY can be used with the standard 8-bit PIP interface
to implement Centronics functions.
When in the pulsed handshake mode, the PIP transmitter may be configured to ignore the
BUSY signal or to suspend the assertion of the STB output until the receiver’s BUSY signal
is negated.
7.13.5.2 PULSED HANDSHAKE TIMING. The pulsed handshake mode transmitter timing
is shown in Figure 7-88. In the pulsed handshake mode, four Centronics receive timing
options select the relative timing of the BUSY signal to the ACK signal.
The timing parameters for the pulsed handshake mode are governed by two user-program-
mable timing parameters, TPAR1 and TPAR2. Each parameter defines an interval from 1 to
256 system clocks. Figure 7-89 through Figure 7-92 show the definition of TPAR1 and
TPAR2 in the four receive modes.
7-336
DATA
STB
TRANSMITTER
TRANSMITTER
RECEIVER
RECEIVER
(BUSY)
DATA
STBO
STBO
(ACK)
(STB)
PB0
Figure 7-87. Pulsed Handshake Busy Signal
Figure 7-88. Centronics Transmitter Timing
Freescale Semiconductor, Inc.
For More Information On This Product,
T SETUP
MC68360 USER’S MANUAL
TPAR 1
Go to: www.freescale.com
T WIDTH
T HOLD
TPAR 2

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