MC68360ZP25L Freescale Semiconductor, MC68360ZP25L Datasheet - Page 217

IC MPU QUICC 25MHZ 357-PBGA

MC68360ZP25L

Manufacturer Part Number
MC68360ZP25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor

Specifications of MC68360ZP25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Result Data:
5.6.2.8.10 Dump Memory Block (DUMP). DUMP is used in conjunction with the READ
command to dump large blocks of memory. An initial READ is executed to set up the starting
address of the block and to retrieve the first result. Subsequent operands are retrieved with
the DUMP command. The initial address is incremented by the operand size (1, 2, or 4) and
saved in a temporary register. Subsequent DUMP commands use this address, increment
it by the current operand size, and store the updated address back in the temporary register.
The size field is examined each time a DUMP command is given, allowing the operand size
to be altered dynamically.
Command Format:
Command Sequence:
Successful write operations return a status of $0FFFF. Bus or address errors on the write
cycle are indicated by the assertion of bit 16 in the status message and by a data pattern
of $0001.
15
0
14
0
The DUMP command does not check for a valid address in the
temporary register—DUMP is a valid command only when pre-
ceded by another DUMP or by a READ command. Otherwise,
the results are undefined. The NOP command can be used for
intercommand padding without corrupting the address pointer.
13
0
12
1
DUMP (LONG)
DUMP (LONG)
???
???
Freescale Semiconductor, Inc.
11
1
For More Information On This Product,
10
1
MC68360 USER’S MANUAL
LOCATION
Go to: www.freescale.com
LOCATION
MEMORY
MEMORY
READ
READ
9
0
NOTE
8
1
7
OP SIZE
"NOT READY"
BERR/AERR
"NOT READY"
MS RESULT
BERR/AERR
NEXT CMD
"ILLEGAL"
NEXT CMD
"ILLEGAL"
RESULT
XXX
XXX
XXX
XXX
XXX
XXX
6
5
0
"NOT READY"
"NOT READY"
"NOT READY"
"NOT READY"
LS RESULT
NEXT CMR
NEXT CMD
NEXT CMD
NEXT CMD
NEXT CMD
4
0
3
0
2
0
1
0
CPU32+
0
0

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