FW80960VH100 Intel, FW80960VH100 Datasheet - Page 42

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FW80960VH100

Manufacturer Part Number
FW80960VH100
Description
IC MPU I960VH 3V 100MHZ 324-BGA
Manufacturer
Intel
Datasheet

Specifications of FW80960VH100

Rohs Status
RoHS non-compliant
Processor Type
i960
Features
VH suffix, 32-Bit, 16K Cache
Speed
100MHz
Voltage
3V
Mounting Type
Surface Mount
Package / Case
324-BGA
Other names
820682

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FW80960VH100
Manufacturer:
Intel
Quantity:
10 000
80960VH
4.4.1
4.4.2
42
Table 23. Relative Output Timings
Table 24. Fast Page Mode Non-interleaved DRAM Output Timings
Table 25. Fast Page Mode Interleaved DRAM Output Timings (Sheet 1 of 2)
Relative Output Timings
Memory Controller Relative Output Timings
NOTES:
1. Guaranteed by design. May not be 100% tested.
2. See Figure 13, (pg. 47).
3. See Figure 14, (pg. 48)
4. Outputs precharged to V
NOTES:
1. Signal generated on the rising edge of an internally generated 2XCLK which corresponds to the center of an P_CLK
2. Output switching between V
NOTES:
1. Signal generated on the rising edge of an internally generated 2XCLK which corresponds to the center of an P_CLK
2. Output switching between V
Symbol
Symbol
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
period. For testing purposes, the signal is specified relative to the rising edge of P_CLK with the 0.5Tc period offset.
period. For testing purposes, the signal is specified relative to the rising edge of P_CLK with the 0.5Tc period offset.
OV10
OV12
OV13
OV14
OV15
OV16
OV17
OV11
DXD
OV6
OV7
OV8
OV9
LXL
LXA
ALE Width
Address Hold from ALE Inactive
DT/R# Valid to DEN# Active
RAS3:0# Rising and Falling edge Output Valid
Delay
CAS7:0# Rising Edge Output Valid Delay
CAS7:0# Falling Edge Output Valid Delay
MA11:0 Output Valid Delay-Row Address
MA11:0 Output Valid Delay-Column Address
DWE1:0# Rising and Falling edge Output Valid
Delay
RAS3:0# Rising and Falling edge Output Valid
Delay
CAS7:0# Rising Edge Output Valid Delay
CAS7:0# Falling Edge Output Valid Delay
MA11:0 Output Valid Delay-Row Address
MA11:0 Output Valid Delay-Column Address
DWE1:0# Rising and Falling Edge Output Valid
Delay
Parameter
CC5
CC3
CC3
maximum.
Description
maximum and V
maximum and V
Description
SS
SS
.
.
0.5T
0.5T
0.5T
Min
C
C
C
-3
-1
-3
Max
0.5Tc+1
0.5Tc+1
Min
0.5Tc+1
0.5Tc+1
1
1
1
1
Min
1
1
1
1
Units
ns
ns
ns
0.5Tc+10
0.5Tc+8
0.5Tc+10
(1,2,4)
Equal Loading (1,2,4)
Equal Loading (1,3,4)
0.5Tc+8
Max
Preliminary Datasheet
10
Max
11
9
8
10
11
9
8
Notes
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
1,2
1,2
1,2
1,2
2
2
2
2
2
2
2
2

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