FW80960VH100 Intel, FW80960VH100 Datasheet - Page 40

• Manufacturer Part Number: FW80960VH100
• Description: IC MPU I960VH 3V 100MHZ 324-BGA
• Manufacturer: Intel

Specifications of FW80960VH100

• Rohs Status: RoHS non-compliant
• Processor Type: i960
• Features: VH suffix, 32-Bit, 16K Cache
• Speed: 100MHz
• Voltage: 3V
• Mounting Type: Surface Mount
• Package / Case: 324-BGA
• Other names: 820682

80960VH
4.4
40
Table 20. Input Clock Timings
Table 21. Synchronous Output Timings
AC Specifications
NOTES:
1. See Figure 9, (pg. 46).
2. To ensure a 1:1 relationship between the amplitude of the input jitter and the internal clock, the jitter frequency spectrum
3. Not tested.
NOTES:
1. Inactive ALE refers to the falling edge of ALE. For inactive ALE timings, see
2. See Figure 10, (pg. 46).
3. A float condition occurs when the output current becomes less than I
4. See Figure 11, (pg. 47).
5. Outputs precharged to V
Symbol
Symbol
T
T
T
T
T
T
T
should not have any power peaking between 500 KHz and 1/3 of the P_CLK frequency.
T
longer than the valid delay.
T
T
T
T
T
OV1
OV2
OV3
OV4
OV5
OF
CS
CH
CR
CL
CF
C
F
Output Valid Delay - All Local Bus Signals Except
ALE Inactive and DT/R#
Output Valid Delay, DT/R#
Output Valid Delay - PCI Signals Except P_REQ#
Output Valid Delay P_REQ#
Output Valid Delay - DP3:0
Output Float Delay
P_CLK Frequency
P_CLK Period
P_CLK Period Stability
P_CLK High Time
P_CLK Low Time
P_CLK Rise Time
P_CLK Fall Time
Parameter
CC5
maximum.
Parameter
Min
16
30
12
12
33.33
±250
Max
62.5
4
4
LO
. Float delay is not tested, but is designed to be no
0.5 T
Units
MHz
V/ns
V/ns
Min
ns
ps
ns
ns
Table 23, Relative Output Timings (pg.
2
2
2
3
3
C
+3
(1)
Adjacent Clocks (2,3)
Measured at 1.5 V (2,3)
Measured at 1.5 V (2,3)
0.4 V to 2.4 V (2,3)
2.4 V to 0.4 V (2,3)
0.5 T
Preliminary Datasheet
Max
15.5
+15
11
12
19
13
C
Notes
Units
ns
ns
ns
ns
ns
ns
Notes
(1,2,5)
(3,4,5)
(2,5)
(2,5)
(2,5)
(2,5)
42).