PCX755BVZFU300LE Atmel, PCX755BVZFU300LE Datasheet - Page 22

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PCX755BVZFU300LE

Manufacturer Part Number
PCX755BVZFU300LE
Description
IC MPU 32BIT 300MHZ 360PBGA
Manufacturer
Atmel
Datasheet

Specifications of PCX755BVZFU300LE

Processor Type
PowerPC 32-Bit RISC
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
360-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCX755BVZFU300LE
Manufacturer:
Atmel
Quantity:
10 000
7. Power consideration
7.1
22
Power management
PC755/745
Assuming an air velocity of 0.5 m/s, we have an effective R
T
resulting in a die-junction temperature of approximately 81°C which is well within the maximum
operating temperature of the component.
Other heat sinks offered by Chip Coolers, IERC, Thermalloy, Wakefield Engineering, and Aavid
Engineering offer different heat sink-to-ambient thermal resistances, and may or may not need
air flow.
Though the die junction-to-ambient and the heat sink-to-ambient thermal resistances are a com-
mon figure-of-merit used for comparing the thermal performance of various microelectronic
packaging technologies, one should exercise caution when only using this metric in determining
thermal management because no single parameter can adequately describe three-dimensional
heat flow. The final die-junction operating temperature, is not only a function of the component-
level thermal resistance, but the system-level design and its operating conditions. In addition to
the component’s power consumption, a number of factors affect the final operating die-junction
temperature — airflow, board population (local heat flux of adjacent components), heat sink effi-
ciency, heat sink attach, heat sink placement, next-level interconnect technology, system air
temperature rise, altitude, etc.
Due to the complexity and the many variations of system-level boundary conditions for today’s
microelectronic equipment, the combined effects of the heat transfer mechanisms (radiation,
convection and conduction) may vary widely. For these reasons, we recommend using conju-
gate heat transfer models for the board, as well as, system-level designs. To expedite system-
level thermal analysis, several “compact” thermal-package models are available within FLO-
THERM
The PC755 provides four power modes, selectable by setting the appropriate control bits in the
MSR and HIDO registers. The four power modes are as follows:
J
• Full-power: This is the default power state of the PC755. The PC755 is fully powered and the
• Doze: All the functional units of the PC755 are disabled except for the time base/decrementer
• Nap: The nap mode further reduces power consumption by disabling bus snooping, leaving
= 30°C + 5°C+ (0.03°C/W +1.0°C/W + 7°C/W) × 5.0 W
internal functional units operate at the full processor clock speed. If the dynamic power
management mode is enabled, functional units that are idle will automatically enter a low-
power state without affecting performance, software execution, or external hardware.
registers and the bus snooping logic. When the processor is in doze mode, an external
asynchronous interrupt, a system management interrupt, a decrementer exception, a hard or
soft reset, or machine check brings the PC755 into the full-power state. The PC755 in doze
mode maintains the PLL in a fully powered state and locked to the system external clock
input (SYSCLK) so a transition to the full-power state takes only a few processor clock cycles.
only the time base register and the PLL in a powered state. The PC755 returns to the full-
power state upon receipt of an external asynchronous interrupt, a system management
interrupt, a decrementer exception, a hard or soft reset, or a machine check input (MCP). A
return to full-power state from a nap state takes only a few processor clock cycles.
®
. These are available upon request.
sa
of 7°C/W, thus
2138G–HIREL–05/06

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