PCX755BVZFU300LE Atmel, PCX755BVZFU300LE Datasheet - Page 12

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PCX755BVZFU300LE

Manufacturer Part Number
PCX755BVZFU300LE
Description
IC MPU 32BIT 300MHZ 360PBGA
Manufacturer
Atmel
Datasheet

Specifications of PCX755BVZFU300LE

Processor Type
PowerPC 32-Bit RISC
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
360-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCX755BVZFU300LE
Manufacturer:
Atmel
Quantity:
10 000
Table 2-2.
Notes:
12
Signal Name
TEA
TLBISYNC
TMS
TRST
TS
TSIZ[0
TT[0
WT
VDD
VOLTDET
-
(6)
4]
(6)
-
1. OV
2. These are test signals for factory use only and must be pulled up to OV
3. To allow for future I/O voltage changes, provide the option to connect BVSEL and L2VSEL independently to either OV
4. These pins are reserved for potential future use as additional L2 address pins.
5. Uses one of 9 existing no
6. Internal pull up on die.
7. Internally tied to L2OV
8. This is different from the PC745 255-BGA package.
2]
PC755/745
(7)
L2ZZ); L2OV
the L2 control signals; and V
and L2AV
selected by the BVSEL/L2VSEL pin configurations of
mended value of V
(selects 3.3V) or to OGND (selects 1.8V/2.0V).
is not a power supply input.
DD
Pinout Listing for the PC755, 360 PBGA, CBGA, HiTCE CBGA and CI-CGA Packages
supplies power to the processor bus, JTAG, and all control signals except the L2 cache controls (L2CE, L2WE, and
DD
Pin Number
J1
A3
C8
A10
K7
A9, B9, C9
C10, D11, B12, C12, F11
C3
G8, G10, G12, J8, J10, J12, L8, L10, L12, N8, N10, N12
K13
respectively). These columns serve as a reference for the nominal voltage supported on a given signal as
DD
supplies power to the L2 cache interface (L2ADDR[0
IN
or supply voltages see
DD
in the PC755 360
-
connects in PC750’s 360
DD
supplies power to the processor core and the PLL and DLL (after filtering to become AV
-
BGA package to indicate the power present at the L2 cache interface. This signal
“Recommended Operating Conditions
-
BGA package.
Table 5-1 on page 15
-
16], L2DATA[0
DD
for normal machine operation.
and the voltage supplied. For actual recom-
Active
High
High
High
High
Low
Low
Low
Low
Low
-
63], L2DP[0
(1)
” on page 16
Output
Output
Output
Input
Input
Input
Input
I/O
I/O
I/O
-
7] and L2SYNC
(8)
1.8V/2.0V
.
(Continued)
Supported
I/F Voltages
2V
2138G–HIREL–05/06
-
OUT) and
3.3V
(1)
2V
DD
DD

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