MC68030RC50C Freescale Semiconductor, MC68030RC50C Datasheet - Page 436

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MC68030RC50C

Manufacturer Part Number
MC68030RC50C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68030RC50C

Processor Type
M680x0 32-Bit
Speed
50MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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10.4.12 Transfer to/from Top of Stack Primitive
MOTOROLA
LcAI Pc I 0" I 0 I 1 I 1 I
The transfer to/from top of stack primitive transfers an operand between the
to 2.8.1
top of stack primitive.
This primitive uses the CA, PC, and DR bits as previously described. If the
to be transferred. The operand may be one, two, or four bytes in length;
for the transfer is the (A7)+ addressing mode. A one-byte operand causes
the stack pointer to be incremented by two after the transfer to maintain
the currently active stack. The implied effective address mode used for the
transfer is the - (A7) addressing mode. A one-byte operand causes the stack
coprocessor and the top of the currently active main processor stack (refer
category instructions. Figure 10-32 shows the format of the transfer to/from
coprocessor issues this primitive with CA=0 during a conditional category
cessing.
other length values cause the main processor to initiate protocol violation
exception processing.
system stack to the operand CIR. The implied effective address mode used
word alignment of the stack.
instruction, the main processor initiates protocol violation exception pro-
Bits [0-7] of the primitive format specify the length in bytes of the operand
If DR =0, the main processor transfers the operand from the currently active
If DR = 1, the main processor transfers the operand from the operand CIR to
pointer to be decremented by two before the transfer to maintain word align-
ment of the stack.
15
14
Figure 10-32. Transfer To/From Top of Stack Primitive Format
System Stack).
13
12 11
MC68030 USER'S MANUAL
This primitive applies to general and conditional
10
9
8
7
I 0 I
LE.GT.
10-49
0
I
10

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