MC68030RC50C Freescale Semiconductor, MC68030RC50C Datasheet - Page 42

• Manufacturer Part Number: MC68030RC50C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC50C

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

M O T O R O L A
ABCD.
ADD
ADDA
ADDI
ADDQ
ADDX
AND
ANDI
ASL, ASR
BSR
BTST
CAS
CAS2
CHK
CMP
CMPA
CMPI
CMPM
CMP2
DIVU, DIVUL
EOR
JSR
Bcc
BCHG
BCLR
BFCHG
BFCLR
BFEXTS
BFEXTU
BFFFO
BFINS
BFSET
BFTST
BKPT
BRA
BSET
CHK2
CLR
DBcc
DIVS, DIVSL
EORI
EXG
EXT, EXTB
ILLEGAL
JMP
LEA
LINK
LSL, LSR
MOVE
MOVEA
MOVE CCR
MOVE SR
Mnemonic
Add Decimal with Extend
Add
Arithmetic Shift Left and Right
Test Bit and Change
Test Bit and Clear
Test Bit Field and Change
Test Bit Field and Clear
Test
Test Bit
Add Address
Add Immediate
Add Quick
Add with Extend
Branch Conditionally
Signed Bit Field Extract
Test Bit Field and Set
Test Bit Field
Breakpoint
Branch to Subroutine
Compare and Swap Operands
Compare and Swap Dual Operands
Check Register Against Bound
Check Register Against Upper and
Clear
Compare
Compare Address
Compare Immediate
Compare Memory to Memory
Compare Register Against Upper and
Test Condition, Decrement and Branch
Signed Divide
Unsigned Divide
Logical Exclusive OR
Exchange Registers
Sign Extend
Take Illegal Instruction Trap
Jump
Jump to Subroutine
Load Effective Address
Link and Allocate
Logical Shift Left and Right
Logical AND
Logical AND Immediate
Unsigned Bit Field Extract
Bit Field Find First One
Bit Field Insert
Branch
Logical Exclusive OR Immediate
Move
Move Address
Move Condition Code Register
Move Status Register
Lower Bounds
Lower Bounds
Bit
and Set
Description
Table 1-2. Instruction Set
M C 6 8 0 3 0 USER'S M A N U A L
MOVE USP
MOVEC
MOVEM
MOVEP
MOVEQ
MOVES
MULS
M U L U
NBCD
NEG
NEGX
NOP
NOT
OR
ORI
ORI CCR
ORI SR
PACK
PEA
PLOADR,
PMOVE
PMOVEFD
SWAP
TAS
TRAP
TRAPcc
TRAPV
TST
UNLK
UNPK
PFLUSH
PFLUSHA
PTESTR,
RESET
ROL, ROR
ROXL, ROXR
RTD
RTE
RTR
RTS
SBCD
Scc
STOP
SUB
SUBA
SUBI
SUBQ
SUBX
Mnemonic
PLOADW
PTESTW
Signed Multiply
Move User Stack Pointer
Move Control Register
Move Multiple Registers
Move Peripheral
Move Quick
Move Alternate Address Space
U n s i g n e d Multiply
Negate Decimal with Extend
Negate
Negate with Extend
No Operation
Logical Complement
Logical Inclusive OR
Logical inclusive OR Immediate
Logical Inclusive OR Immediate to
Logical Inclusive OR Immediate to Status
Pack BCD
Push Effective Address
Load Entry into the ATC
Move to/from MMU Registers
Move to/from MMU Registers with Flush
Test a Logical Address
Subtract Decimal with Extend
Swap Register Words
Test Operand and Set
Trap
Trap Conditionally
Trap on Overflow
Test Operand
Unlink
Unpack BCD
Flush Entry(ies) in the ATC
Flush All Entries in the ATC
Reset External Devices
Rotate Left and Right
Rotate with Extend Left and Right
Return and Deallocate
Return from Exception
Return and Restore Codes
Return from Subroutine
Set Conditionally
Stop
Subtract
Subtract Address
Subtract Immediate
Subtract Quick
Subtract with Extend
Condition Codes
Register
Disable
Description
1-13
1