MC68030RC50C Freescale Semiconductor, MC68030RC50C Datasheet - Page 100

• Manufacturer Part Number: MC68030RC50C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC50C

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

3.3.1 C o n d i t i o n Code C o m p u t a t i o n
M O T O R O L A
and store the result in the destination location. Single-operand operations
take a destination operand, compute, and store the result in the destination
Most operations take a source operand and a destination operand, compute,
location. Table 3-12 lists each instruction and how it affects the condition
code bits.
ABCD
ADD, ADDI, ADDQ
ADDX
AND, ANDI, EOR, EORI,
CLR, EXT, NOT, TAS, T S T
CHK
CHK2, CMP2
MOVEQ, MOVE, OR, ORI,
SUB, SUBI, SUBQ
SUBX
CAS, CAS2, CMP, CMPI,
CMPM
DIVS, DUVI
MULS, M U L U
SBCD, NBCD
NEG
NEGX
Operations
Table 3-12. Condition Code Computations (Sheet 1 of 2)
- -
- -
- -
- -
- -
- -
X
*
*
*
*
*
*
*
*
M C 6 8 0 3 0
U
*
*
*
*
*
U
U
*
*
*
N
*
*
*
*
?
*
U
?
*
*
*
?
*
?
*
?
?
Z
U S E R ' S
?
U
?
?
U
?
U
?
?
U
?
?
?
0
V
?
?
?
U
?
?
0
0
?
?
?
?
?
0
M A N U A L
C
Z = Z .\ Rm A . . . . ,k
Z = Z A R m A . . . . ,\ R0
Z = (R = LB) V ( R = UB)
C = (LB < = UB) ,.~. (IR < LB) V (R > UB))
V = S m A D m A R m V S m
C = S m
V = S m ? , D m A R m V S m . \ D m
Z = Z A R m A . . . A R 0
V = Division O v e r f l o w
V = Multiplication O v e r f l o w
C = Decimal Borrow
Z = Z A R m A . . . A
V = Dm A R m
C = D m V R m
V = Dm A Rm
C = D m V R m
Z = Z A R m A . . . A R 0
C = S m A D m V R m , . \ D m V S m A R m
C = Sm A D m V R m , , \
C = Sm A D m V R m , ' , D m V S m
V = Sm A I 3 m A R m V S m A D m A R m
C = S m A D m V R m A D m V S m A R m
C = Decimal Carry
V = S m . ~ D m A R m V S m A D m
V = Sm A Dm A R m V S m
V ( U B < L B ) A ( R > U B ) A ( B < L B )
A D m V R m . \
Special Definition
Ro
D m V S m
D m V S m
A Dm A R m
A D m A R m
A Rm
A R m
A R m
A R m
A R m
3 - 1 5
3