MC68360CAI25L Freescale Semiconductor, MC68360CAI25L Datasheet - Page 67

IC MPU QUICC 25MHZ 240-FQFP

MC68360CAI25L

Manufacturer Part Number
MC68360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Controller Family/series
68K
Core Size
32 Bit
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
Supply Voltage Range
3V To 3.6V, 4.75V To 5.25V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Freescale Semiconductor, Inc.
SECTION 3
QUICC MEMORY MAP
The following tables present a programmer’s model (register map) of all registers in the
QUICC. For more information about a particular register, refer to the description for the mod-
ule or sub-module indicated in the right column. The address column indicates the offset of
the register from the address stored in the module base address register (MBAR). This reg-
ister in the SIM block controls the location of all internal memory/registers as well as their
supervisor/user access space (see Section 6 System Integration Module (SIM60)). Bold let-
ters mark registers that are restricted to supervisor access. Other registers are programma-
ble to exist in either supervisor or user space. Registers that are reset only by hard reset are
marked with an H in the reset value column. All of the registers are memory-mapped.
All internal memory and registers occupy a single 8-Kbyte memory block that is relocatable
along 8-Kbyte boundaries. The location is fixed by writing the desired base address of the
8-Kbyte memory block to the MBAR using the MOVES instruction. The MBAR is the only
exception since it resides at a fixed location in $03FF00.
The 8-Kbyte block is divided into two 4-Kbyte sections. The RAM occupies the first section;
the internal registers occupy the second section. The location of the QUICC registers is
shown in Figure 3-1.
MC68360 USER’S MANUAL
For More Information On This Product,
Go to: www.freescale.com
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