MC68360CAI25L Freescale Semiconductor, MC68360CAI25L Datasheet - Page 560

IC MPU QUICC 25MHZ 240-FQFP

MC68360CAI25L

Manufacturer Part Number
MC68360CAI25L
Description
IC MPU QUICC 25MHZ 240-FQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68360CAI25L

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
240-FQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
FQFP
Controller Family/series
68K
Core Size
32 Bit
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
FQFP
Supply Voltage Range
3V To 3.6V, 4.75V To 5.25V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Freescale Semiconductor, Inc.
Serial Communication Controllers (SCCs)
then begins retransmission on the LAN, called a retry. If the frame is not successfully trans-
mitted within 15 retries, then an error is indicated.
A few key Ethernet timing parameters are as follows. The Ethernet of 10 Mbps gives 0.8 s
per byte. The preamble plus start frame delimiter is transmitted in 6.4 s. The minimum inter-
frame gap is 9.6 s. The slot time is 52 s.
7.10.23.1 ETHERNET ON QUICC—MC68EN360. The Ethernet protocol is available only
on the Ethernet version of the QUICC, called the MC68EN360. The non-Ethernet version of
the QUICC is the MC68360. The term "QUICC" is the overall device name that denotes all
versions of the device.
The MC68EN360 is a superset of the MC68360, having the additional option allowing Ether-
net operation on any of the four SCCs. Due to performance reason not all SCCs can be con-
figured as Ethernet controller at the same time. The MC68EN360 is not restricted only to
Ethernet operation. HDLC, UART, and other protocols may be used to allow dynamic
switching between protocols. See Appendix A Serial Performance for available SCC perfor-
mance.
When the MODE bits of the SCC GSMR select the Ethernet protocol, then that SCC per-
forms the full set of IEEE 802.3/Ethernet CSMA/CD media access control and channel inter-
face functions (see Figure 7-66).
The QUICC Ethernet controller requires an external serial interface adaptor (SIA) and trans-
ceiver function to complete the interface to the media. This function is implemented in the
Motorola MC68160 enhanced Ethernet serial transceiver (EEST).
The QUICC+EEST solution provides a direct connection to the attachment unit interface
(AUI) or twisted-pair (10BASE-T). The EEST provides a glueless interface to the QUICC,
Manchester encoding and decoding, automatic selection of 10BASE-T versus AUI ports,
10BASE-T polarity detection and correction, LED drivers, and a low-power mode. For more
information, refer to the MC68160 device description.
The QUICC Ethernet controller provides a number of features listed below. Although the
QUICC contains DPLLs that allow Manchester encoding and decoding, these DPLLs were
not designed for Ethernet rates. Therefore, the Ethernet controller on the QUICC bypasses
the on-chip DPLLs and uses the external SIA on the EEST instead.
7-236
MC68360 USER’S MANUAL
For More Information On This Product,
Go to: www.freescale.com

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